-
公开(公告)号:US20180292454A1
公开(公告)日:2018-10-11
申请号:US15944244
申请日:2018-04-03
发明人: Harold M. Kutz , Timothy John Williams , Bert S. Sullam , Warren S. Snyder , James H. Shutt , Bruce E. Byrkett , Monte Mar , Eashwar Thiagarajan , Nathan Wayne Kohagen , David G. Wright , Mark E Hastings , Dennis R. Seguine
IPC分类号: G01R31/3177 , G06F13/28 , H03K19/173 , G01R31/317
CPC分类号: G01R31/3177 , G01R31/31721 , G06F13/28 , H03K19/173
摘要: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.
-
公开(公告)号:US09880536B1
公开(公告)日:2018-01-30
申请号:US14865824
申请日:2015-09-25
发明人: Bert S. Sullam , Harold M. Kutz , Monte Mar , Eashwar Thiagarajan , Timothy Williams , David G. Wright
IPC分类号: G06F15/177 , G05B19/042 , H04L29/08 , H04L29/06
CPC分类号: G05B19/042 , G05B2219/25257 , G06F15/7867 , H04L29/06 , H04L29/08981 , H04L2025/0342
摘要: A programmable system includes a programmable analog system that is reconfigurable to perform various analog operations, and includes a programmable digital system that is reconfigurable to perform various digital operations. The programmable system also includes a microcontroller capable of reconfiguring and controlling the programmable analog system and the programmable digital system. The programmable digital system is configured to control the programmable analog system autonomously of the microcontroller.
-
公开(公告)号:US09553588B2
公开(公告)日:2017-01-24
申请号:US14968247
申请日:2015-12-14
IPC分类号: G06F7/38 , H03K19/173 , H03K19/177
CPC分类号: H03K19/17744 , H03K19/173 , H03K19/177 , H03K19/17704 , H03K19/1776
摘要: Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. Configuration registers or configuration memory in the integrated circuit store configuration values loaded by the micro-controller. Connectors are configured to connect the integrated circuit to external signals A system level interconnect also located in the integrated circuit programmably connects together the different functional elements and different connectors according to the configuration values loaded into the configuration registers.
摘要翻译: 不同的功能元件都位于相同的集成电路中,其中至少一个功能元件包括微控制器。 集成电路中的配置寄存器或配置存储器存储由微控制器加载的配置值。 连接器被配置为将集成电路连接到外部信号。还集成电路中的系统级互连可根据加载到配置寄存器中的配置值可编程地将不同功能元件和不同连接器连接在一起。
-
公开(公告)号:US10345377B2
公开(公告)日:2019-07-09
申请号:US15944244
申请日:2018-04-03
发明人: Harold M. Kutz , Timothy John Williams , Bert S. Sullam , Warren S. Snyder , James H. Shutt , Bruce E. Byrkett , Monte Mar , Eashwar Thiagarajan , Nathan Wayne Kohagen , David G. Wright , Mark E. Hastings , Dennis R. Seguine
IPC分类号: G06F13/28 , G01R31/317 , H03K19/173 , G01R31/3177
摘要: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.
-
公开(公告)号:US09952282B1
公开(公告)日:2018-04-24
申请号:US14860515
申请日:2015-09-21
发明人: Harold M. Kutz , Timothy John Williams , Bert S. Sullam , Warren S. Snyder , James H. Shutt , Bruce E. Byrkett , Monte Mar , Eashwar Thiagarajan , Nathan Wayne Kohagen , David G. Wright , Mark E Hastings , Dennis R. Seguine
IPC分类号: H03K19/173 , G01R31/3177 , G01R31/317
CPC分类号: G01R31/3177 , G01R31/31721 , G06F13/28 , H03K19/173
摘要: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manager coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.
-
公开(公告)号:US09124285B1
公开(公告)日:2015-09-01
申请号:US14150627
申请日:2014-01-08
发明人: Harold M. Kutz , Warren S. Snyder , Bert S. Sullam , Dennis R. Seguine , Gajender Rohilla , Eashwar Thiagarajan
CPC分类号: H03M1/1009 , H03M1/1061 , H03M1/12
摘要: A system for the calibration of a programmable system-on-a-chip is described. More specifically, embodiments of the present invention relate to a system that calibrates a programmable analog block in a system-on-a-chip without the use of external components.
摘要翻译: 描述了用于校准可编程片上系统的系统。 更具体地,本发明的实施例涉及在不使用外部组件的情况下校准片上系统中的可编程模拟块的系统。
-
7.
公开(公告)号:US20170286344A1
公开(公告)日:2017-10-05
申请号:US15463703
申请日:2017-03-20
发明人: Bert S. Sullam , Harold M. Kutz , Timothy John Williams , James H. Shutt , Bruce E. Byrkett , Melany Ann Richmond , Nathan Wayne Kohagen , Mark E. Hastings , Eashwar Thiagarajan , Warren S. Snyder
IPC分类号: G06F13/40
CPC分类号: G06F13/4022 , G06F2213/0038
摘要: An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined operations in response to instruction data.
-
公开(公告)号:US20160105186A1
公开(公告)日:2016-04-14
申请号:US14968247
申请日:2015-12-14
IPC分类号: H03K19/177
CPC分类号: H03K19/17744 , H03K19/173 , H03K19/177 , H03K19/17704 , H03K19/1776
摘要: Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. Configuration registers or configuration memory in the integrated circuit store configuration values loaded by the micro-controller. Connectors are configured to connect the integrated circuit to external signals A system level interconnect also located in the integrated circuit programmably connects together the different functional elements and different connectors according to the configuration values loaded into the configuration registers.
摘要翻译: 不同的功能元件都位于相同的集成电路中,其中至少一个功能元件包括微控制器。 集成电路中的配置寄存器或配置存储器存储由微控制器加载的配置值。 连接器被配置为将集成电路连接到外部信号。还集成电路中的系统级互连可根据加载到配置寄存器中的配置值可编程地将不同功能元件和不同连接器连接在一起。
-
9.
公开(公告)号:US09143134B1
公开(公告)日:2015-09-22
申请号:US13916386
申请日:2013-06-12
发明人: Harold M. Kutz , Timothy J. Williams , Bert S. Sullam , Warren S. Snyder , James H. Shutt , Bruce E. Byrkett , Monte Mar , Eashwar Thiagarajan , Nathan Kohagen , David G. Wright , Mark E. Hastings , Dennis Raymond Seguine
IPC分类号: H03K19/0175 , H03K19/094 , H03K19/173
CPC分类号: G01R31/3177 , G01R31/31721 , G06F13/28 , H03K19/173
摘要: A system and apparatus are described for providing greater flexibility and performance in a mixed-signal array through improved and highly configurable routing, control elements and signal processing capabilities.
摘要翻译: 描述了一种系统和装置,用于通过改进和高度可配置的路由,控制元件和信号处理能力在混合信号阵列中提供更大的灵活性和性能。
-
-
-
-
-
-
-
-