公开(公告)号：US10432150B2

公开(公告)日：2019-10-01

申请号：US15993955

申请日：2018-05-31

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Ramya Balasundaram ,  Bhupendra Manola ,  Pradeep Dhananjay

IPC: H03F1/30 ,  H03F3/45 ,  H03F3/187 ,  H03F1/52 ,  G06F3/16

Abstract: An apparatus may include a digital-to-analog converter configured to convert a digital audio input signal into a differential analog input signal with a substantially non-zero common-mode voltage, an amplifier configured to receive the differential analog input signal and generate at an amplifier output a ground-centered output signal from the differential analog input signal, a clamp configured to selectively couple and decouple the amplifier output to a ground voltage, and a controller configured to control the clamp to selectively couple and decouple the amplifier output to a ground voltage responsive to transitions between power states of a device comprising the apparatus and control the differential analog input signal generated by the digital-to-analog converter in order to minimize a level transition current through an output load coupled to the amplifier output during transitions between the power states.

公开(公告)号：US11115046B2

公开(公告)日：2021-09-07

申请号：US16431276

申请日：2019-06-04

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Vamsikrishna Parupalli ,  Mark May ,  Saurabh Singh ,  Ramya Balasundaram ,  Mengde Wang ,  Eric B. Smith

IPC: H04N5/232 ,  H03M1/50 ,  H03M1/82 ,  H03M3/00 ,  H03M1/12 ,  G03B5/00

Abstract: A system may include an output stage for driving a load at an output of the output stage, a pulse-width modulation mode path configured to pre-drive the output stage in a first mode of operation, a linear mode path configured to pre-drive the output stage in a second mode of operation and a loop filter coupled at its input to the output of the output stage and coupled at its output to both of the pulse-width modulation mode path and the linear mode path. The pulse-width modulation mode path and the linear mode path may be configured such that a first transfer function between the output of the loop filter and the output of the output stage is substantially equivalent to a second transfer function between the output of the loop filter and the output of the output stage.

公开(公告)号：US09723578B2

公开(公告)日：2017-08-01

申请号：US15175871

申请日：2016-06-07

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： John L. Melanson ,  Aaron J. Brennan ,  Justin Dougherty ,  Ramya Balasundaram

IPC: G01R31/308 ,  H04W52/36 ,  H04W52/32 ,  G01R31/311 ,  G01R31/28

CPC classification number: H04W52/367 ,  G01R31/2837 ,  G01R31/2875 ,  G01R31/311 ,  H04W52/32

Abstract: In accordance with embodiments of the present disclosure, a method for identifying a location of an integrated circuit that is sensitive to RTS noise may include applying localized heat to a scan area of the integrated circuit, observing any change in one or more electrical parameters of the integrated circuit in response to the localized heat being applied to the scan area indicative of sensitivity to RTS noise, and identifying the location sensitive to RTS noise responsive to observing change in one or more electrical parameters of the integrated circuit indicative of sensitivity to RTS noise in response to the localized heat being applied to the scan area.