公开(公告)号：US20130277778A1

公开(公告)日：2013-10-24

申请号：US13452230

申请日：2012-04-20

Applicant: Chern-Yow HSU ,  Shih-Chang LIU ,  Chia-Shiung TSAI

Inventor： Chern-Yow HSU ,  Shih-Chang LIU ,  Chia-Shiung TSAI

IPC: H01L29/82 ,  H01L21/8246

Abstract: This description relates to a method for fabricating a magnetoresistive random access memory (MRAM) device having a plurality of magnetic tunnel junction (MTJ) units. The method includes forming a bottom conductive layer, forming an anti-ferromagnetic layer and forming a tunnel layer over the bottom conductive layer and the anti-ferromagnetic layer. The method further includes forming a free magnetic layer, having a magnetic moment aligned in a direction that is adjustable by applying an electromagnetic field, over the tunnel layer and forming a top conductive layer over the free magnetic layer. The method further includes performing at least one lithographic process to remove portions of the bottom conductive layer, the anti-ferromagnetic layer, the tunnel layer, the free magnetic layer and the top conductive layer that is uncovered by the photoresist layer until the bottom conductive layer is exposed and removing portions of at least one sidewall of the MTJ unit.

Abstract translation: 该描述涉及一种用于制造具有多个磁性隧道结（MTJ）单元的磁阻随机存取存储器（MRAM）装置的方法。 该方法包括形成底部导电层，形成反铁磁层并在底部导电层和反铁磁层上形成隧道层。 该方法还包括形成自由磁性层，该磁性层在通过施加电磁场的可调整方向上对准磁矩，并在隧道层上形成顶部导电层，并在自由磁性层上形成顶部导电层。 该方法还包括执行至少一个光刻工艺以去除由光致抗蚀剂层未覆盖的底部导电层，反铁磁层，隧道层，自由磁性层和顶部导电层的部分，直到底部导电层 暴露并去除MTJ单元的至少一个侧壁的部分。

公开(公告)号：US20120104339A1

公开(公告)日：2012-05-03

申请号：US12913117

申请日：2010-10-27

Applicant: Ming-Huei SHEN ,  Tsun Kai TSAO ,  Shih-Chang LIU ,  Chia-Shiung TSAI

Inventor： Ming-Huei SHEN ,  Tsun Kai TSAO ,  Shih-Chang LIU ,  Chia-Shiung TSAI

IPC: H01L45/00 ,  H01L21/02 ,  H01L21/10

CPC classification number: H01L45/1253 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1666

Abstract: On a first structure having a first dielectric layer, a second dielectric layer, and a third dielectric layer a crown is formed through the third dielectric layer and the second dielectric layer. A fourth dielectric layer is deposited over the first structure and thereby is over the crown. A portion of the fourth dielectric layer is removed to form a first spacer having a remaining portion of the fourth dielectric layer. A portion of the third electric layer is also removed during the removal of the portion the fourth dielectric layer, resulting in a second spacer having a remaining portion of the third dielectric layer. A second structure is thereby formed. A phase change material layer is deposited over the second structure. An electrode layer is deposited over the phase change layer. Portions of the electrode layer and the phase change layer are removed by a chemical-mechanical-polishing process to form a phase change region having a remaining portion of the phase change layer and to form an electrode region having a remaining portion of the electrode layer.

Abstract translation: 在具有第一电介质层，第二电介质层和第三电介质层的第一结构上，通过第三电介质层和第二电介质层形成表冠。 在第一结构上沉积第四电介质层，从而在冠部上方。 去除第四电介质层的一部分以形成具有第四电介质层的剩余部分的第一间隔物。 在去除第四介电层的部分期间，第三电层的一部分也被去除，导致具有第三介电层的剩余部分的第二间隔物。 由此形成第二结构。 相变材料层沉积在第二结构上。 电极层沉积在相变层上。 通过化学机械抛光工艺除去电极层和相变层的一部分，形成具有相变层的剩余部分的相变区域，并形成具有电极层的剩余部分的电极区域。

公开(公告)号：US20120235280A1

公开(公告)日：2012-09-20

申请号：US13047468

申请日：2011-03-14

Applicant: Wei-Tung HUANG ,  Chun-Tsung KUO ,  Shih-Chang LIU ,  Yeur-Luen TU

Inventor： Wei-Tung HUANG ,  Chun-Tsung KUO ,  Shih-Chang LIU ,  Yeur-Luen TU

IPC: H01L29/735 ,  H01L21/331

CPC classification number: H01L29/165 ,  H01L21/8249 ,  H01L29/66242 ,  H01L29/7378

Abstract: An integrated circuit includes a bipolar transistor disposed over a substrate. The bipolar transistor includes a base electrode disposed around at least one germanium-containing layer. An emitter electrode is disposed over the at least one germanium-containing layer. At least one isolation structure is disposed between the emitter electrode and the at least one germanium-containing layer. A top surface of the at least one isolation structure is disposed between and electrically isolating a top surface of the emitter electrode from a top surface of the at least one germanium-containing layer.

Abstract translation: 集成电路包括设置在衬底上的双极晶体管。 双极晶体管包括设置在至少一个含锗层周围的基极。 发射极电极设置在所述至少一个含锗层上。 至少一个隔离结构设置在发射电极和至少一个含锗层之间。 所述至少一个隔离结构的顶表面设置在所述发射电极的顶表面与所述至少一个含锗层的顶表面之间并将其电隔离。