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公开(公告)号：US11557959B2
公开(公告)日：2023-01-17
申请号：US16959015
申请日：2018-12-29
发明人： Shen Xu , Minggang Chen , Hao Wang , Jinyu Xiao , Wei Su , Weifeng Sun , Longxing Shi
摘要： An automatic dead zone time optimization system in a primary-side regulation flyback power supply continuous conduction mode (CCM), including a closed loop formed by a control system, including a single output digital to analog converter (DAC) midpoint sampling module, a digital control module, a current detection module, a dead zone time calculation module and a pulse-width modulation (PWM) driving module, and a controlled synchronous rectification primary-side regulation flyback converter. A primary-side current is sampled using a DAC Sampling mechanism to calculate a secondary-side average current, so as to obtain a primary-side average current and a secondary-side average current, in the case of CCM. A secondary-side current is input into the dead zone time calculation module to obtain a reasonable dead zone time; and the PWM driving module is jointly controlled by a primary-side regulation loop and the obtained dead zone time.
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2.发明授权公开(公告)号：US11336217B2
公开(公告)日：2022-05-17
申请号：US16958868
申请日：2018-12-29
发明人： Rui Zhong , Mingshu Zhang , Sen Zhang , Jinyu Xiao , Wei Su , Weifeng Sun , Longxing Shi
摘要： A method and an apparatus for reducing noise of a switched reluctance motor, includes: supplying a PWM signal as a driving signal to a driving circuit of a switched reluctance motor; and varying a carrier frequency of the PWM signal as an operation period of the switched reluctance motor varies; if the switched reluctance motor changes phase, determining that the operation period of the switched reluctance motor varies.
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公开(公告)号：US10290726B2
公开(公告)日：2019-05-14
申请号：US15548290
申请日：2016-01-28
IPC分类号： H01L29/10 , H01L29/40 , H01L29/423 , H01L29/735 , H01L29/739
摘要： A lateral insulated gate bipolar transistor, comprising: a substrate (100), having a first conductivity type; an insulating layer (200), formed on the substrate (100); an epitaxial layer (300), having a second conductivity type and formed on the insulating layer (200); a field oxide layer (400), formed on the epitaxial layer (300); a first well (500), having the first conductivity type; a plurality of gate trench structures (600); second source doped regions (720), having the second conductivity type; first source doped regions (710), having the first conductivity type; a second well (800), having the second conductivity type; a first drain doped region (910), having the first conductivity type and formed on a surface layer of the second well (800); gate lead-out ends (10); a source lead-out end (20); a drain lead-out end (30).
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4.发明授权公开(公告)号：US11323039B2
公开(公告)日：2022-05-03
申请号：US16959001
申请日：2018-12-29
发明人： Weifeng Sun , Rongrong Tao , Hao Wang , Jinyu Xiao , Wei Su , Shen Xu , Longxing Shi
摘要： A method for improving the conversion efficiency of a CCM mode of a flyback resonant switch power supply, comprising: presetting a critical value Tset, calculating a time interval Ttap between adjacent zero points in the current connection time, outputting a shutdown signal at the zero points, and comparing the time interval Ttap with the preset critical value Tset; when Ttap>Tset, controlling the current shutdown time to be less than the shutdown time of the preceding cycle and outputting a start signal; when Ttap=0, controlling the current shutdown time to be greater than the shutdown time of the preceding cycle and outputting a start signal; and when 0
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公开(公告)号：US11201557B2
公开(公告)日：2021-12-14
申请号：US16959116
申请日：2018-12-29
发明人： Qinsong Qian , Shengyou Xu , Feng Lin , Hao Wang , Wei Su , Qi Liu , Longxing Shi
摘要： A control system for synchronous rectifying transistor of LLC converter, the system comprising a voltage sampling circuit, a high-pass filtering circuit, a PI compensation and effective value detection circuit, and a control system taking a microcontroller (MCU) as a core. When the LLC converter is operating at a high frequency, a drain-source voltage VDS(SR) of the synchronous rectifying transistor delivers, via the sampling circuit, a change signal of the drain-source voltage during turn-off into the high-pass filtering circuit and the PI compensation and effective value detection circuit to obtain an effective value amplification signal of a drain-source voltage oscillation signal caused by parasitic parameters, and the current value is compared with a previously collected value via a control circuit taking a microcontroller (MCU) as a core, so as to change a turning-on time of the synchronous rectifying transistor in the next period.
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