公开(公告)号：US09702934B1

公开(公告)日：2017-07-11

申请号：US14921769

申请日：2015-10-23

Applicant: Cadence Design Systems, Inc.

Inventor： Dale Edward Meehl ,  Vivek Chickermane

IPC: G06F11/22 ,  G06F17/50 ,  G01R31/3183 ,  G01R31/3177

CPC classification number: G01R31/318335 ,  G01R31/3177 ,  G01R31/318547

Abstract: Systems and methods disclosed herein provide for efficiently loading mask data to the mask register bits from the decompression network outputs of an ATPG system. The systems and methods also provide an elastic interface utilized between a tester and a decompressor network (e.g., sequential and combinational decompressors) in order to expand the number of input variables utilized during the loading of the mask data to the mask register bits.

公开(公告)号：US09817068B1

公开(公告)日：2017-11-14

申请号：US14754386

申请日：2015-06-29

Applicant: Cadence Design Systems, Inc.

Inventor： Vivek Chickermane ,  Krishna Vijaya Chakravadhanula ,  Brian Edward Foutz ,  Steev Wilcox ,  Paul Alexander Cunningham ,  David George Scott ,  Louis Christopher Milano ,  Dale Edward Meehl

IPC: G01R31/3177 ,  G01R31/3181 ,  G01R31/3183 ,  G01R31/3185 ,  G01R31/319

CPC classification number: G01R31/31813 ,  G01R31/318335 ,  G01R31/318385 ,  G01R31/318544 ,  G01R31/318547 ,  G01R31/31921

Abstract: Systems and methods efficiently bring additional variables into a Pseudo-Random Pattern Generator (“PRPG”) in the early cycles of an automatic test pattern generation (“ATPG”) process without utilizing any additional hardware or control pins. Overscanning (e.g., scanning longer than the length of the longest channel) for some additional cycles brings in enough variables into the PRPG. Data corresponding to earlier cycles of the ATPG process is removed.

公开(公告)号：US09448282B1

公开(公告)日：2016-09-20

申请号：US14179299

申请日：2014-02-12

Applicant: CADENCE DESIGN SYSTEMS, INC.

Inventor： Dale Edward Meehl

IPC: G01R31/3185 ,  G01R31/3177 ,  G01R31/317 ,  G01R31/3183

CPC classification number: G01R31/318335 ,  G01R31/31703 ,  G01R31/318536 ,  G01R31/318547 ,  G01R31/318563 ,  G01R31/318566

Abstract: A system and method are provided for selective bit-wise masking of X-values in scan channels in an integrated circuit (IC) during a built-in self test (BIST). The composite mask pattern is selectively generated according to locations of X-values identified in a simulation of the IC. The composite mask pattern is stored on the IC and cyclically maintained while being applied to the operational scan results of the IC. The composite mask pattern is recycled over a plurality of scan iterations to effectively prevent the X-values from influencing the resulting signature of the BIST that represents a functional fingerprint of the IC and minimize storage requirements for the composite mask pattern.

Abstract translation: 提供了一种系统和方法，用于在内置自检（BIST）期间在集成电路（IC）的扫描通道中对X值进行选择性逐位屏蔽。 根据在IC的仿真中识别的X值的位置选择性地生成复合掩模图案。 复合掩模图案被存储在IC上并在被应用于IC的操作扫描结果的同时循环地保持。 复合掩模图案在多个扫描迭代中被再循环，以有效地防止X值影响表示IC的功能指纹的BIST的结果签名，并且最小化复合掩模图案的存储要求。

公开(公告)号：US09470754B1

公开(公告)日：2016-10-18

申请号：US14737331

申请日：2015-06-11

Applicant: Cadence Design Systems, Inc.

Inventor： Vivek Chickermane ,  Krishna Vijaya Chakravadhanula ,  Brian Edward Foutz ,  Steev Wilcox ,  Paul Alexander Cunningham ,  David George Scott ,  Louis Christopher Milano ,  Dale Edward Meehl

IPC: G01R31/28 ,  G01R31/3177

CPC classification number: G01R31/318335 ,  G01R31/3177 ,  G01R31/318547

Abstract: Systems and methods disclosed herein provide for utilizing extra variables in the decompression equation set of an ATPG process for test patterns requiring an excess number of care bits than can be supported efficiently by the current hardware. An elastic interface is utilized between a tester and a decompressor network (e.g., sequential and combinational decompressors) in order to expand the test pattern length and/or the number of input variables. The systems and methods also provide care bits in early scan cycles of the ATPG process for sequential decompressors starting from a fixed state.

Abstract translation: 本文公开的系统和方法提供了在ATPG过程的解压缩方程组中利用额外的变量，用于需要超过当前硬件有效支持的多余护理位的测试模式。 在测试器和解压缩器网络（例如，顺序和组合解压缩器）之间使用弹性接口，以便扩展测试图案长度和/或输入变量的数量。 这些系统和方法还在ATPG过程的早期扫描周期中为从固定状态开始的顺序解压缩器提供护理位。