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公开(公告)号:US11243767B2
公开(公告)日:2022-02-08
申请号:US17018424
申请日:2020-09-11
Inventor: Chao Tang , Xueliang Du , Yingnan Xu , Kang An
IPC: G06F9/30 , G06F9/38 , G06F9/54 , G06F12/0868 , G06F12/0875 , G06F12/0893
Abstract: A caching device, an instruction cache, a system for processing an instruction, a method and apparatus for processing data and a medium are provided. The caching device includes a first queue, a second queue, a write port group, a read port, a first pop-up port, a second pop-up port and a press-in port. The is configured to write cache data into a set storage address in the first queue and/or the second queue; the read port is configured to read all cache data from the first queue and/or the second queue at one time; the press-in port is configured to press cache data into the first queue and/or the second queue; the first pop-up port is configured to pop up cache data from the first queue; and the second pop-up port is configured to pop up cache data from the second queue.
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公开(公告)号:US20210271475A1
公开(公告)日:2021-09-02
申请号:US17018424
申请日:2020-09-11
Inventor: Chao Tang , Xueliang Du , Yingnan Xu , Kang An
Abstract: A caching device, an instruction cache, a system for processing an instruction, a method and apparatus for processing data and a medium are provided. The caching device includes a first queue, a second queue, a write port group, a read port, a first pop-up port, a second pop-up port and a press-in port. The is configured to write cache data into a set storage address in the first queue and/or the second queue; the read port is configured to read all cache data from the first queue and/or the second queue at one time; the press-in port is configured to press cache data into the first queue and/or the second queue; the first pop-up port is configured to pop up cache data from the first queue; and the second pop-up port is configured to pop up cache data from the second queue.
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3.
公开(公告)号:US11748108B2
公开(公告)日:2023-09-05
申请号:US17210616
申请日:2021-03-24
Applicant: Beijing Baidu Netcom Science and Technology Co., Ltd. , Kunlunxin Technology (Beijing) Company Limited
Inventor: Yingnan Xu , Jian Ouyang , Xueliang Du , Kang An
CPC classification number: G06F9/3834 , G06F9/30087 , G06F9/3838
Abstract: Example embodiments of the present application provide an instruction executing method and apparatus, an electronic device, and a computer-readable storage medium that may be applied in the field of artificial intelligence. The instruction executing method may include: executing an instruction sequence that includes memory instructions and non-memory instructions, the instructions in the sequence executed starting to be executed in order; determining that execution of a first memory instruction needs to be completed before a second memory instruction starts to be executed, the second memory instruction being a next memory instruction following the first memory instruction in the instruction sequence; and executing non-memory instructions between the first memory instruction and the second memory instruction without executing the second memory instruction, during a cycle of executing the first memory instruction.
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公开(公告)号:US11782722B2
公开(公告)日:2023-10-10
申请号:US17149476
申请日:2021-01-14
Applicant: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD. , KUNLUNXIN TECHNOLOGY (BEIJING) COMPANY LIMITED
Inventor: Baofu Zhao , Xueliang Du , Kang An , Yingnan Xu , Chao Tang
IPC: G06F9/38
CPC classification number: G06F9/3877 , G06F9/3836
Abstract: A complex computing device, a complex computing method, an artificial intelligence chip and an electronic apparatus are provided. An input interface receives complex computing instructions and arbitrates each complex computing instruction to a corresponding computing component respectively, according to the computing types in the respective complex computing instructions Each computing component is connected to the input interface, acquires a source operand from a complex computing instruction to perform complex computing, and generates a computing result instruction to feed back to an output interface. The output interface arbitrates the computing result in each computing result instruction to the corresponding instruction source respectively, according to the instruction source identifier in each computing result instruction.
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5.
公开(公告)号:US20210271482A1
公开(公告)日:2021-09-02
申请号:US17210616
申请日:2021-03-24
Inventor: Yingnan Xu , Jian Ouyang , Xueliang Du , Kang An
Abstract: Example embodiments of the present application provide an instruction executing method and apparatus, an electronic device, and a computer-readable storage medium that may be applied in the field of artificial intelligence. The instruction executing method may include: executing an instruction sequence that includes memory instructions and non-memory instructions, the instructions in the sequence executed starting to be executed in order; determining that execution of a first memory instruction needs to be completed before a second memory instruction starts to be executed, the second memory instruction being a next memory instruction following the first memory instruction in the instruction sequence; and executing non-memory instructions between the first memory instruction and the second memory instruction without executing the second memory instruction, during a cycle of executing the first memory instruction.
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