公开(公告)号：US11243767B2

公开(公告)日：2022-02-08

申请号：US17018424

申请日：2020-09-11

Applicant: Beijing Baidu Netcom Science and Technology Co., Ltd.

Inventor： Chao Tang ,  Xueliang Du ,  Yingnan Xu ,  Kang An

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/54 ,  G06F12/0868 ,  G06F12/0875 ,  G06F12/0893

Abstract: A caching device, an instruction cache, a system for processing an instruction, a method and apparatus for processing data and a medium are provided. The caching device includes a first queue, a second queue, a write port group, a read port, a first pop-up port, a second pop-up port and a press-in port. The is configured to write cache data into a set storage address in the first queue and/or the second queue; the read port is configured to read all cache data from the first queue and/or the second queue at one time; the press-in port is configured to press cache data into the first queue and/or the second queue; the first pop-up port is configured to pop up cache data from the first queue; and the second pop-up port is configured to pop up cache data from the second queue.

公开(公告)号：US20210271475A1

公开(公告)日：2021-09-02

申请号：US17018424

申请日：2020-09-11

Applicant: Beijing Baidu Netcom Science and Technology Co., Ltd.

Inventor： Chao Tang ,  Xueliang Du ,  Yingnan Xu ,  Kang An

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/54

Abstract: A caching device, an instruction cache, a system for processing an instruction, a method and apparatus for processing data and a medium are provided. The caching device includes a first queue, a second queue, a write port group, a read port, a first pop-up port, a second pop-up port and a press-in port. The is configured to write cache data into a set storage address in the first queue and/or the second queue; the read port is configured to read all cache data from the first queue and/or the second queue at one time; the press-in port is configured to press cache data into the first queue and/or the second queue; the first pop-up port is configured to pop up cache data from the first queue; and the second pop-up port is configured to pop up cache data from the second queue.

公开(公告)号：US11327762B2

公开(公告)日：2022-05-10

申请号：US17036596

申请日：2020-09-29

Applicant: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.

Inventor： Chao Tang ,  Xueliang Du ,  Yingnan Xu

IPC: G06F9/30 ,  G06F9/38

Abstract: An instruction prefetching method, a device and a medium are provided. The method includes the following: instructions in a target buffer are precompiled before a processor core fetches a required instruction from the target buffer corresponding to the processor core; if it is determined that a jump instruction exists in the target buffer and a jump target instruction corresponding to the jump instruction is not cached in the target buffer according to a precompiled result, the jump target instruction is prefetched from an icache into a candidate buffer corresponding to the processor core to wait for the processor core to fetch the jump target instruction from the candidate buffer; the target buffer and the candidate buffer are alternately reused during instruction prefetching.

公开(公告)号：US11782722B2

公开(公告)日：2023-10-10

申请号：US17149476

申请日：2021-01-14

Applicant: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD. ,  KUNLUNXIN TECHNOLOGY (BEIJING) COMPANY LIMITED

Inventor： Baofu Zhao ,  Xueliang Du ,  Kang An ,  Yingnan Xu ,  Chao Tang

IPC: G06F9/38

CPC classification number: G06F9/3877 ,  G06F9/3836

Abstract: A complex computing device, a complex computing method, an artificial intelligence chip and an electronic apparatus are provided. An input interface receives complex computing instructions and arbitrates each complex computing instruction to a corresponding computing component respectively, according to the computing types in the respective complex computing instructions Each computing component is connected to the input interface, acquires a source operand from a complex computing instruction to perform complex computing, and generates a computing result instruction to feed back to an output interface. The output interface arbitrates the computing result in each computing result instruction to the corresponding instruction source respectively, according to the instruction source identifier in each computing result instruction.

公开(公告)号：US11748099B2

公开(公告)日：2023-09-05

申请号：US17377548

申请日：2021-07-16

Applicant: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.

Inventor： Chao Tang ,  Xueliang Du

IPC: G06F9/50 ,  G06F11/34 ,  G06F9/30

CPC classification number: G06F9/3004

Abstract: The disclosure discloses a method for executing instructions, a device and a computer readable storage medium. The detailed implementation includes: obtaining a first memory access instruction for execution, in which the first memory access instruction includes a first address range of a memory to be accessed; in response to detecting a predetermined instruction for monitoring an accessed address range of the memory, executing the predetermined instruction to obtain a remaining address range not accessed by the first memory access instruction in the first address range; comparing the remaining address range with a second address range included in a second memory access instruction to be executed; and suspending execution of the second memory access instruction in response to the remaining address range at least partially overlapping with the second address range.