公开(公告)号：US20190199329A1

公开(公告)日：2019-06-27

申请号：US15851755

申请日：2017-12-22

Applicant: Bar Ilan University

Inventor： Joseph Shor ,  Natan Vinshtok-Melnik

IPC: H03K3/03 ,  G01K7/01

CPC classification number: H03K3/0315 ,  G01K7/01

Abstract: A sensor circuit includes at least one ring oscillator having a supply port supplied by at least one current source and a reference frequency. A comparator compares a frequency output of the at least one ring oscillator with the reference frequency to yield a measurement, such as a temperature measurement.

公开(公告)号：US20190074984A1

公开(公告)日：2019-03-07

申请号：US15694809

申请日：2017-09-03

Applicant: BAR-ILAN UNIVERSITY

Inventor： Joseph Shor ,  Yoav Weizman ,  Yitzhak Schifmann

IPC: H04L9/32 ,  G11C11/412 ,  G11C11/417

Abstract: A method for detecting unreliable bits in transistor circuitry includes applying a controllable physical parameter to a transistor circuitry, thereby causing a variation in a digital code of a cryptologic element in the transistor circuitry, the variation being a tilt or bias in a positive or negative direction. An amount of variation in the digital code of the cryptologic element is determined. Unreliable bits in the transistor circuitry are defined as those bits for which the variation is in a range defined as unreliable.

公开(公告)号：US20220166431A1

公开(公告)日：2022-05-26

申请号：US17529456

申请日：2021-11-18

Applicant: Bar Ilan University

Inventor： Joseph Shor ,  Yitzhak Schifmann ,  Inbal Stanger ,  Netanel Shavit ,  Edison Ramiro Taco Lasso ,  Alexander Fish

IPC: H03K19/003 ,  G06F1/30 ,  G01R19/165

Abstract: A technique to mitigate timing errors induced by power supply droops includes an inverter-based droop detector as well as Dual Mode Logic (DML) to achieve a droop-resist ant timing response. The droop detector is based on capacitor ratios and is thus less sensitive to Process/Voltage/Temperature (PVT) and to random offset than the prior art. The DML can alter its power/performance ratio based on the droop level input it receives from the detector, such that the critical timings are preserved.

公开(公告)号：US10061336B1

公开(公告)日：2018-08-28

申请号：US15796807

申请日：2017-10-29

Applicant: Bar Ilan University

Inventor： Joseph Shor

IPC: G05F1/59

CPC classification number: G05F1/59 ,  G05F3/30

Abstract: A bandgap reference (BGREF) circuit includes at least one switch capacitor impedance element including a capacitor coupled with switches that receive a reference frequency. The at least one switch capacitor element is coupled with at least one diode. The BGREF circuit is operative to create a voltage reference.

公开(公告)号：US20240053386A1

公开(公告)日：2024-02-15

申请号：US18362532

申请日：2023-07-31

Applicant: Bar Ilan University

Inventor： Joseph Shor ,  Amir Mizrahi ,  Gil Golan ,  Orel Dahaman ,  Omer Nechushtan

IPC: G01R19/25 ,  G01R15/16

CPC classification number: G01R19/25 ,  G01R15/16

Abstract: A method for measuring voltage droop and temperature in a circuit include using capacitive coupling to couple a bias voltage of a current controlled oscillator (CCO) to a noisy digital Vcc (VCCD) supply, so that a frequency of the CCO is independent of a DC Vcc level of the noisy VCCD supply and the CCO measures an AC voltage droop of the noisy VCCD supply and a temperature which is dependent upon the AC voltage droop.

公开(公告)号：US10998889B2

公开(公告)日：2021-05-04

申请号：US15851755

申请日：2017-12-22

Applicant: Bar Ilan University

Inventor： Joseph Shor ,  Natan Vinshtok-Melnik

IPC: H03K3/03 ,  G01K7/01 ,  G01K7/32 ,  H03L1/02 ,  H03M1/10 ,  G01R31/26 ,  H03M1/00 ,  H03B5/32 ,  G01K17/00 ,  G01R19/00 ,  H03L1/04 ,  G01K7/00

Abstract: A sensor circuit includes at least one ring oscillator having a supply port supplied by at least one current source and a reference frequency. A comparator compares a frequency output of the at least one ring oscillator with the reference frequency to yield a measurement, such as a temperature measurement.

公开(公告)号：US20190165953A1

公开(公告)日：2019-05-30

申请号：US15825457

申请日：2017-11-29

Applicant: Bar Ilan University

Inventor： Joseph Shor ,  Roi Levi ,  Yoav Weizman

IPC: H04L9/32 ,  H04W12/06

Abstract: A physical unclonable function (PUF) array includes a plurality of PUF transistor cells each of which includes at least one inverter. An input and an output of the at least one inverter are shorted to a first reference node. There is adjustment circuitry for adjusting a reference voltage of the first reference node, and measurement circuitry for measuring a trip point of the at least one inverter. If the trip point is close to the reference voltage then bits of the at least one inverter are defined as unstable.