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公开(公告)号：US20240241542A1
公开(公告)日：2024-07-18
申请号：US17925658
申请日：2021-12-20
Applicant: BOE Technology Group Co., Ltd.
Inventor： Deshuai Wang , Jian Sun , Zhen Wang , Yue Shan , Wei Yan , Jian Zhang , Han Zhang , Wenwen Qin , Yadong Zhang , Xiaoyan Yang , Keyan Liu , Hong Liu
IPC: G06F1/16
CPC classification number: G06F1/1643 , G06F1/1639 , G06F1/1658
Abstract: A display panel includes: a base substrate including a display region and a fan-out region, and the fan-out region is located between the display region and a chip; a plurality of data wires/touch wires located in the fan-out region for respectively electrically connecting a plurality of data lines/touch signal lines with the chip. A portion of the plurality of data wires is located in a first conductive layer while a rest portion thereof is located in the second conductive layer. A portion of the plurality of touch wires is located in at least one of the first conductive layer and the second conductive layer while a rest portion thereof is located in the third conductive layer. A pitch between any two adjacent wires in the first/second/third conductive layer is a first/second/third wire pitch, respectively. The first wire pitch and the second wire pitch are smaller than the third wire pitch.
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公开(公告)号：US11366534B2
公开(公告)日：2022-06-21
申请号：US16300411
申请日：2018-03-05
Inventor： Zifeng Wang , Fengguo Wang , Dawei Shi , Bo Ma , Hong Liu , Xinguo Wu , Wentao Wang , Lina Wang
Abstract: A touch substrate and a manufacturing method thereof, and an in-cell touch panel. The touch substrate includes: a base substrate, a first insulation layer, a transmission line and a common electrode. The first insulation layer is on the base substrate, and a groove extending in a first direction is in the first insulation layer; the transmission line is in the groove and is configured to transmit an electrical signal; the common electrode overlaps with the transmission line and is electrically connected with the transmission line.
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公开(公告)号：US11347334B2
公开(公告)日：2022-05-31
申请号：US16471393
申请日：2018-12-04
Inventor： Cenhong Duan , Dawei Shi , Fengguo Wang , Feng Li , Hong Liu , Xinguo Wu , Lu Yang , Wentao Wang , Zifeng Wang , Bo Ma , Yuanbo Li , Zhixuan Guo , Jing Zhao , Haiqin Liang
Abstract: An array substrate, a method for fabricating the same, and a display device are provided. The array substrate includes: a base substrate; touch electrode wiring including a first conductive layer and a second conductive layer, where the first conductive layer is between the base substrate and the second conductive layer, the second conductive layer includes at least one first via hole to expose the first conductive layer, and the first conductive layer has a higher electrical conductivity than that of the second conductive layer; a planarization layer on the second conductive layer, where the planarization layer includes at least one first touch electrode contact hole; and touch electrode on the planarization layer, where the touch electrode is connected with the first conductive layer through the first touch electrode contact hole and the first via hole.
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公开(公告)号：US11163204B2
公开(公告)日：2021-11-02
申请号：US16811122
申请日：2020-03-06
Inventor： Hong Liu , Yezhou Fang , Fengguo Wang , Xinguo Wu , Zhixuan Guo , Haidong Wang , Liang Tian , Kai Li , Bo Ma
IPC: G02F1/1362 , G02F1/1333 , G02F1/1343
Abstract: An array substrate, a display panel including the same, and a display device are provided. The array substrate includes: a base substrate and a planarization layer on the base substrate. A first conductive layer is disposed on a side of the planarization layer away from the base substrate. A first passivation layer is disposed on a side of the first conductive layer and the side of the planarization layer not being covered by the first conductive layer, away from the base substrate, and provided with a plurality of stress release openings. An insulating layer is disposed in the stress release openings and on a side of the first passivation layer away from the planarization layer. A second conductive layer is disposed on a side of the insulating layer away from the planarization layer.
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公开(公告)号：US11127885B2
公开(公告)日：2021-09-21
申请号：US16826244
申请日：2020-03-22
Inventor： Hong Liu , Yezhou Fang , Fengguo Wang , Xinguo Wu , Zhixuan Guo , Haidong Wang , Liang Tian , Dong Zhang , Yue Yang , Yulin Cui
Abstract: Disclosed are an array substrate, a display panel and a display device. The array substrate includes: a base substrate provided with a bonding region for packaging a chip on film, and a first electrode structure, an interlayer dielectric layer, a second electrode structure and a third electrode structure sequentially arranged on the base substrate, the orthographic projections of the first electrode structure, the interlayer dielectric layer, the second electrode structure and the third electrode structure on the base substrate being located in the bonding region. The array substrate further includes protection layers located between the first portion of the second electrode structure and a third electrode and between the second portion of the second electrode structure and the third electrode respectively; and the protection layers cover the side end face of the first portion and the side end face of the second end surface.
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Patent Agency Ranking
公开(公告)号：US20200251066A1
公开(公告)日：2020-08-06
申请号：US16549229
申请日：2019-08-23
Inventor： Guofeng Hu , Yankai Gao , Hong Liu , Yuxin Bi , Yanhui Xi , Bin Dai , Mingjian Yu , Hong Wang , Donghui Wang
IPC: G09G3/36
Abstract: Provided are a gate drive circuit and a driving method thereof, a display panel and a display device. The gate drive circuit includes a first sub-circuit group and a second sub-circuit group. The first sub-circuit group can drive the mth row to the first row of pixels of the N rows of pixels in the display panel row by row, and the second sub-circuit group can drive the (m+1)th row to the Nth row of pixels row by row. In addition, m is greater than 1 and less than N.
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公开(公告)号：US12174478B2
公开(公告)日：2024-12-24
申请号：US18014189
申请日：2022-05-11
Inventor： Jianyun Xie , Peng Liu , Jingyi Xu , Hong Liu , Peirong Huo , Zhiming Li , Guodong Wang
IPC: G02F1/1333 , G02F1/1343
Abstract: A display panel relates to the field of display technology, and includes: a first base substrate and a second base substrate arranged oppositely; a liquid crystal layer and a plurality of conductive layers, wherein the liquid crystal layer and the plurality of conductive layers are located between the first base substrate and the second base substrate; and a plurality of heating elements, wherein the plurality of heating elements are distributed in at least one of the conductive layers.
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公开(公告)号：US12135849B2
公开(公告)日：2024-11-05
申请号：US17789243
申请日：2021-08-04
Inventor： Peng Liu , Peirong Huo , Hong Liu , Chao Liang , Aiyu Ding , Zhenhong Xiao , Yongqiang Zhang , Yusheng Liu , Jingyi Xu , Jiantao Liu , Bo Li
IPC: G06F3/041
Abstract: Provided is a touch display substrate. The touch display substrate includes a base substrate, including a display region and a non-display region; a plurality of touch electrodes disposed in the display region; and a plurality of signal transmission circuits, a plurality of first control lines, a plurality of second control lines, a target signal line, and a plurality of touch signal lines that are disposed in the non-display region.
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公开(公告)号：US12111554B2
公开(公告)日：2024-10-08
申请号：US17791338
申请日：2021-08-18
Inventor： Hong Liu , Jingyi Xu , Xiaochun Xu , Jiantao Liu , Wanzhi Chen , Chengfu Xu , Bo Li , Yongqiang Zhang , Peng Liu , Ruirui Hao , Yu Feng , Xinguo Wu
IPC: G02F1/1368 , H10K59/124
CPC classification number: G02F1/1368 , H10K59/124
Abstract: The present disclosure provides a display substrate and a display panel, and belongs to the field of display technology. The present display substrate includes a display region and a peripheral region surrounding the display region; the display substrate includes: a base substrate; a plurality of insulating layers sequentially arranged along a direction away from the base substrate; wherein each of the plurality of insulating layers is located in the display region and the peripheral region; one or more protrusion structures arranged between at least two adjacent ones of the plurality of insulating layers and in the peripheral region.
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公开(公告)号：US20240304632A1
公开(公告)日：2024-09-12
申请号：US18027109
申请日：2022-03-01
Inventor： Kai Li , Yezhou Fang , Feng Li , Hong Liu , Yuzhang Wang , Zhiguang Cai , Shan Yan , Chunjing Liu
IPC: H01L27/12
CPC classification number: H01L27/124 , H01L27/1288
Abstract: This application provides a display substrate, a method for manufacturing the same, and a display device, which belongs to the technical field of displays. The method for manufacturing the display substrate comprises: forming a metal layer on a base substrate; forming a photoresist layer on the metal layer; exposing the photoresist layer by using a mask plate; developing the exposed photoresist layer to form a photoresist pattern; and omitting a step of baking the photoresist pattern, and etching the metal layer by using the photoresist pattern as a mask to form a signal line. The technical solution of the present disclosure can realize a narrow frame of a display product.
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