公开(公告)号：US10061173B2

公开(公告)日：2018-08-28

申请号：US15305334

申请日：2015-09-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shuai Zhang ,  Yu Cheng Chan

IPC: H01L29/04 ,  G02F1/1368 ,  G02F1/1343 ,  H01L51/05 ,  H01L51/10 ,  H01L27/28 ,  H01L21/02 ,  H01L21/3105

CPC classification number: G02F1/1368 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y30/00 ,  C08K3/041 ,  G02F1/134309 ,  G02F1/13439 ,  G02F2001/136295 ,  G02F2001/13685 ,  G02F2202/36 ,  H01L21/02274 ,  H01L21/31053 ,  H01L27/283 ,  H01L51/0048 ,  H01L51/0541 ,  H01L51/057 ,  H01L51/0591 ,  H01L51/105

Abstract: Various embodiments provide a thin film transistor (TFT), a fabrication method thereof, and a display apparatus including the TFT. A carbon nanotube layer is formed over a substrate. The carbon nanotube layer includes a first plurality of carbon nanotubes. A plurality of gaps are formed through the carbon nanotube layer to provide a first patterned carbon nanotube layer. Carbon nanotube structures each including a second plurality of carbon nanotubes are formed in the plurality of gaps. The carbon nanotube structures have a carrier mobility different from the first patterned carbon nanotube layer, thereby forming an active layer for forming active structures of the thin-film transistor.

公开(公告)号：US09887213B2

公开(公告)日：2018-02-06

申请号：US15125786

申请日：2015-08-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD

Inventor： Zuqiang Wang ,  Chien Hung Liu ,  Yu Cheng Chan ,  Lujiang Huangfu

IPC: H01L21/02 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1222 ,  H01L21/02675 ,  H01L27/1281 ,  H01L29/66757 ,  H01L29/78675

Abstract: The present disclosure provides a method for forming an active layer with a pattern. The method includes forming an amorphous silicon layer and forming a function layer on the amorphous silicon layer. The function layer has a same pattern as the active layer. The method further includes performing a crystallization process for converting the amorphous silicon layer to a poly-silicon layer. The poly-silicon layer has first portions covered by the function layer and second portions not covered by the function layer, and grain sizes of the poly-silicon in the first portions are larger than grain sizes of the poly-silicon in the second portions.

公开(公告)号：US11177297B2

公开(公告)日：2021-11-16

申请号：US16316174

申请日：2018-05-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Bin Zhang ,  Yu Cheng Chan ,  Tingting Zhou ,  Xiaolong He

IPC: H01L27/12 ,  H01L29/786

Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes a base substrate and a thin film transistor on the base substrate; a light shielding layer is disposed between the thin film transistor and the base substrate, and the light shielding layer includes a light shielding metal layer and a light reflection adjusting layer which are stacked on the base substrate, the light reflection adjusting layer covers the light shielding metal layer, and a reflectance of the light reflection adjusting layer is lower than a reflectance of the light shielding metal layer.

公开(公告)号：US11251250B2

公开(公告)日：2022-02-15

申请号：US16634297

申请日：2019-07-08

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yu Cheng Chan

IPC: H01L27/32 ,  H01L51/52

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate; a first electrode, located on the base substrate; a second electrode, located on the base substrate, an orthographic projection of the second electrode on the base substrate being adjacent to an orthographic projection of the first electrode on the base substrate; and a conductive layer, including a blocking part between opposite side surfaces of the first electrode and the second electrode, the conductive layer being grounded, and every two selected from the group consisting of the first electrode, the second electrode, and the conductive layer being insulated from each other.