知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

17 records (took 0.012 seconds)

    Memory wiring arrangement with changeable common mode rejection circuit loop
    2.
    发明授权
    Memory wiring arrangement with changeable common mode rejection circuit loop 失效
    具有可更改的通用模式拒绝电路的存储器布线

    公开(公告)号：US3633184A

    公开(公告)日：1972-01-04

    申请号：US3633184D

    申请日：1969-07-17

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： HARDING PHILIP A ,  KRAFT GEORGE D

    IPC: G11C7/02 ,  G11C11/06

    CPC classification number: G11C11/06064

    Abstract: The electrical format of a common mode rejection digit circuit for a magnetic memory is changed for reading and writing memory operations by means of multilateral diode bridge switches. A memory word circuit is coupled through memory storage devices to a data digit circuit and two canceling digit circuits associated therewith. The sense of coupling to the canceling circuits is opposite to one another. During writing operations, the data circuit is operated with a canceling circuit which is coupled to the word circuit in opposite sense from the data circuit, and during reading the data circuit is operated with a canceling circuit which is coupled to the word circuit in the same sense as the data circuit to assure equality of opposed shuttle noises in the common mode rejection circuits.

    Abstract translation: 用于磁存储器的共模抑制数字电路的电气格式被改变，以便通过多边二极管桥式开关读取和写入存储器操作。 存储器字电路通过存储器存储装置耦合到数据数字电路和与其相关联的两个抵消数字电路。 耦合到消除电路的感觉彼此相反。 在写入操作期间，数据电路以与数据电路相反的字电路耦合的取消电路来操作，并且在读取期间，数据电路与消除电路一起工作，该抵消电路耦合到相同的字电路 感应为数据电路，以确保共模抑制电路中相反的穿梭噪声相等。

    Multistate magnetic core memory
    10.
    发明授权
    Multistate magnetic core memory 失效
    多核磁芯存储器

    公开(公告)号：US3631412A

    公开(公告)日：1971-12-28

    申请号：US3631412D

    申请日：1970-01-27

    Applicant: BELL TELEPHONE LABOR INC

    Inventor： HARDING PHILIP A

    IPC: G11C11/56 ,  G11C27/00 ,  G11C27/02 ,  G11C5/02 ,  G11C11/06 ,  G11C15/00

    CPC classification number: G11C27/022 ,  G11C11/5607 ,  G11C27/00

    Abstract: A magnetic core memory wherein states of partial magnetization as well as magnetic saturation are employed. In the course of reading information from a core the core is first switched to one extreme state of magnetization to obtain a data readout pulse and subsequently the core is switched to the opposite state of magnetization to obtain a reference data pulse. The ratio of the magnitudes of the reference pulse and the data pulse is measured and is employed to define the state in which the core resided prior to interrogation. Cores are placed in a stable state either a state of partial magnetization or a state of full magnetization, by switching the core from one extreme state of magnetization to the other extreme state of magnetization to obtain a data reference pulse and subsequently the magnitude of this reference pulse is compared with the magnitude of the data pulse which is generated by the writing of new information into the core. The core drive which is employed for writing is terminated when the ratio between the latter data pulse and the reference data pulse has reached a desired ratio.

Patent Agency Ranking