Signal processing circuit
    1.
    发明授权
    Signal processing circuit 失效
    信号处理电路

    公开(公告)号:US3897774A

    公开(公告)日:1975-08-05

    申请号:US43711074

    申请日:1974-01-28

    CPC classification number: A61B5/0472 A61N1/3702

    Abstract: A signal processing circuit for use in a digital memory-type EKG display system wherein analog EKG signals are periodically sampled and converted to a digital signal for processing and display comprises an amplitude hold circuit which maintains the instantaneous amplitude of pacemaker pulses contained in the analog EKG signal constant for a sufficient period of time to insure recognition of the pulses in the next sampling. Because no access is required to the sampling or conversion circuits of the system, the processing circuit can be readily added to an existing system.

    Abstract translation: 一种在数字存储型EKG显示系统中使用的信号处理电路,其中模拟EKG信号被周期性地采样并转换为用于处理和显示的数字信号,包括维持模拟EKG中包含的起搏器脉冲的瞬时振幅的振幅保持电路 信号恒定足够的时间以确保在下一次采样中的脉冲的识别。 由于系统的采样或转换电路不需要访问,处理电路可以容易地添加到现有的系统中。

    Conservation of transient pulses in analog to digital conversion
    2.
    发明授权
    Conservation of transient pulses in analog to digital conversion 失效
    瞬态脉冲在模拟数字转换中的保存

    公开(公告)号:US3689879A

    公开(公告)日:1972-09-05

    申请号:US3689879D

    申请日:1971-05-18

    Inventor: BURDICK THOMAS H

    CPC classification number: A61B5/04004 A61B5/7239 H03M1/124

    Abstract: A composite signal comprising an analog signal with transient pulses superimposed thereon is periodically sampled and each sample is converted to a digital value which is stored in a buffer register prior to transfer to a data processing unit. A special circuit comprising a differentiator and comparator continuously receives the composite signal, detects the transient pulses, and forces a value into the buffer register to represent each transient pulse, even though the pulse may occur during an interval when the composite signal is not being sampled by the normal analog to digital conversion circuit. The special circuit may include a counter which is preset to a value N so that the value representing a transient pulse may be forced into the buffer register during N successive cycles. This permits control of the width of the transient pulses when the digital data is reconverted to analog form.

    Abstract translation: 周期性地对包括叠加有瞬态脉冲的模拟信号的复合信号进行采样,并将每个采样转换为数字值,该数字值在传送到数据处理单元之前被存储在缓冲寄存器中。 包括微分器和比较器的特殊电路连续接收复合信号,检测瞬态脉冲,并强制将值输入到缓冲寄存器中以表示每个瞬态脉冲,即使该脉冲可能在复合信号未被采样的间隔期间发生 由正常的模数转换电路。 特殊电路可以包括预设为值N的计数器,使得在N个连续循环期间可以将表示瞬态脉冲的值强制进入缓冲寄存器。 当数字数据被转换为模拟形式时,这允许控制瞬态脉冲的宽度。

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