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    Processing of issued instructions
    2.
    发明授权
    Processing of issued instructions 有权

    公开(公告)号：US11966739B2

    公开(公告)日：2024-04-23

    申请号：US17941387

    申请日：2022-09-09

    申请人： Arm Limited

    发明人： Matthew James Walker ,  Mbou Eyole ,  Giacomo Gabrielli ,  Balaji Venu

    IPC分类号： G06F9/30 ,  G06F9/38 ,  G06F9/48

    CPC分类号： G06F9/30123 ,  G06F9/30138 ,  G06F9/3824 ,  G06F9/4881 ,  G06F9/30098 ,  G06F9/30145

    摘要： There is provided an apparatus, method and medium for data processing. The apparatus comprises a register file comprising a plurality of data registers, and frontend circuitry responsive to an issued instruction, to control processing circuitry to perform a processing operation to process an input data item to generate an output data item. The processing circuitry is responsive to a first encoding of the issued instruction specifying a data register, to read the input data item from the data register, and/or write the output data item to the data register. The processing circuitry is responsive to a second encoding of the issued instruction specifying a buffer-region of the register file for storing a queue of data items, to perform the processing operation and to perform a dequeue operation to dequeue the input data item from the queue, and/or perform an enqueue operation to enqueue the output data item to the queue.

    METHOD AND APPARATUS FOR POWER MEASUREMENT IN ELECTRONIC CIRCUIT DESIGN AND ANALYSIS
    3.
    发明申请
    METHOD AND APPARATUS FOR POWER MEASUREMENT IN ELECTRONIC CIRCUIT DESIGN AND ANALYSIS 有权

    公开(公告)号：US20220164511A1

    公开(公告)日：2022-05-26

    申请号：US17218670

    申请日：2021-03-31

    申请人： Arm Limited

    发明人： Xiaoqing Xu ,  Zhiyao Xie ,  Shidhartha Das ,  Matthew James Walker ,  Kumara Guru Palaniswamy ,  Matthew Paul Elwood

    IPC分类号： G06F30/367 ,  G01R21/133 ,  G01R31/317

    摘要： A power meter for measuring power usage in a circuit includes preprocessor and a weighting network. The pre-processor is configured to receive toggle data for a number of power proxy signals in the circuit for a plurality of clock cycles of the circuit in a first time window. The power proxy signals and weighting values are determined automatically from simulated or emulated toggle data. For each power proxy signal, the pre-processor averages the toggle data over one or more clock cycles in one or more second time windows, within the first time window, to provide averaged toggle data, and outputs the averaged toggle data for each second time window. The weighting network is configured to combine the averaged toggle data from the power proxy signals, based on a set of weight values, to provide a measure of the power usage.

    Input channel processing for triggered-instruction processing element
    4.
    发明授权
    Input channel processing for triggered-instruction processing element 有权

    公开(公告)号：US12045622B2

    公开(公告)日：2024-07-23

    申请号：US17941404

    申请日：2022-09-09

    申请人： Arm Limited

    发明人： Matthew James Walker ,  Mbou Eyole ,  Giacomo Gabrielli ,  Balaji Venu

    IPC分类号： G06F9/38

    CPC分类号： G06F9/3856 ,  G06F9/3802

    摘要： One or more triggered-instruction processing elements are provided, a given triggered-instruction processing element comprising execution circuitry to execute processing operations in response to instructions according to a triggered instruction architecture. Input channel processing circuitry receives a given tagged data item (comprising a data value and a tag value) for a given input channel, and in response controls enqueuing of the data value of the given tagged data item to a selected buffer structure selected from among at least two buffer structures mapped onto register storage accessible to one or more of the triggered-instruction processing elements in response to a computation instruction for controlling performance of a computation operation. The selected buffer structure is selected based at least on the tag value, so data values of tagged data items specifying different tag values for the given input channel are allocatable to different buffer structures.

    Systems and Methods of Power Management
    7.
    发明申请
    Systems and Methods of Power Management 有权

    公开(公告)号：US20210208803A1

    公开(公告)日：2021-07-08

    申请号：US16735606

    申请日：2020-01-06

    申请人： Arm Limited

    发明人： James Edward Myers ,  Pranay Prabhat ,  Matthew James Walker ,  Parameshwarappa Anand Kumar Savanth ,  Fernando Garcia Redondo

    IPC分类号： G06F3/06 ,  G06F1/3234 ,  G06F1/3221 ,  G06F1/3209

    摘要： According to one implementation of the present disclosure, a method for power management is disclosed. The method includes: computing, by a central processing unit, software instructions of a software workload in an active-mode operation corresponding to a first operating point on a performance curve of a performance mode; transitioning from instances of the active-mode operation to instances of standby-mode operation of the CPU, and recording, by a time tracking element, each of a plurality of standby entry data points; transitioning from the instances of the standby-mode operation to the instances of the active-mode operation of the CPU, and recording, by the time tracking element, each of a plurality of standby exit data points; and determining a second operating point on the performance curve of the performance mode based on the recorded standby entry data points and the recorded standby exit data points.