False-link protection circuit and method for utilizing same
    1.
    发明申请
    False-link protection circuit and method for utilizing same 失效
    假链路保护电路及其利用方法

    公开(公告)号:US20110204967A1

    公开(公告)日:2011-08-25

    申请号:US12660430

    申请日:2010-02-25

    IPC分类号: H04B3/00

    CPC分类号: H04B3/30 H04L25/0272

    摘要: Disclosed is a false-link protection circuit comprising at least one native switch coupled between a communication terminal of a first differential switch and a communication terminal of a second differential switch. The at least one native switch is configured to provide an attenuation path for a pulse link signal received by either communication terminal when the first and second differential switches are in a powered down state. According to one embodiment, a method to attenuate a pulse link signal comprises activating a native switch of a false-link protection circuit by powering down first and second differential switches, receiving a pulse link signal at a communication terminal of one of the first and second differential switches, and attenuating the pulse link signal by diverting it through the false-link protection circuit when the first and second differential switches are in a powered down state.

    摘要翻译: 公开了一种假连接保护电路,其包括耦合在第一差分开关的通信终端和第二差分开关的通信终端之间的至少一个本地开关。 至少一个本地开关被配置为当第一和第二差分开关处于断电状态时,为通信终端接收的脉冲链路信号提供衰减路径。 根据一个实施例,一种衰减脉冲链路信号的方法包括通过断电第一和第二差分开关来激活假链路保护电路的本地交换机,在第一和第二差分开关之一的通信终端处接收脉冲链路信号 差分开关,并且当第一和第二差分开关处于掉电状态时,通过将其通过假链路保护电路分流来衰减脉冲链路信号。

    False-link protection circuit and method for utilizing same
    2.
    发明授权
    False-link protection circuit and method for utilizing same 失效
    假链路保护电路及其利用方法

    公开(公告)号:US08228091B2

    公开(公告)日:2012-07-24

    申请号:US12660430

    申请日:2010-02-25

    IPC分类号: H03K19/007

    CPC分类号: H04B3/30 H04L25/0272

    摘要: Disclosed is a false-link protection circuit comprising at least one native switch coupled between a communication terminal of a first differential switch and a communication terminal of a second differential switch. The at least one native switch is configured to provide an attenuation path for a pulse link signal received by either communication terminal when the first and second differential switches are in a powered down state. According to one embodiment, a method to attenuate a pulse link signal comprises activating a native switch of a false-link protection circuit by powering down first and second differential switches, receiving a pulse link signal at a communication terminal of one of the first and second differential switches, and attenuating the pulse link signal by diverting it through the false-link protection circuit when the first and second differential switches are in a powered down state.

    摘要翻译: 公开了一种假连接保护电路,其包括耦合在第一差分开关的通信终端和第二差分开关的通信终端之间的至少一个本地开关。 至少一个本地开关被配置为当第一和第二差分开关处于断电状态时,为通信终端接收的脉冲链路信号提供衰减路径。 根据一个实施例,一种衰减脉冲链路信号的方法包括通过断电第一和第二差分开关来激活假链路保护电路的本地交换机,在第一和第二差分开关之一的通信终端处接收脉冲链路信号 差分开关,并且当第一和第二差分开关处于掉电状态时,通过将其通过假链路保护电路分流来衰减脉冲链路信号。

    STICK PRODUCT REFILL SYSTEM
    3.
    发明申请

    公开(公告)号:US20210137242A1

    公开(公告)日:2021-05-13

    申请号:US16679892

    申请日:2019-11-11

    申请人: Kevin Chan

    发明人: Kevin Chan

    摘要: A system for refilling a stick product, such as lipstick or deodorant, in a propel-repel dispenser allows the reuse of the propel-repel mechanism. The stick product refill is shaped and dimensioned to be inserted into the open end of the dispenser and to attach to the receptacle that holds the stick product after the used product has been removed. Attachment of the refill to the stick receptacle is by an attachment means on the outer surface of an anchor cap enclosing the distal end of the refill and/or on the receptacle itself. Once secured to the receptacle, the refill can be advanced and retracted by the propel-repel mechanism so that it protrudes when in use and is withdrawn with the dispenser to protect it when not in use.

    System for error checking of process definitions for batch processes
    4.
    发明授权
    System for error checking of process definitions for batch processes 有权
    用于批处理流程定义的错误检查系统

    公开(公告)号:US08924974B1

    公开(公告)日:2014-12-30

    申请号:US13156276

    申请日:2011-06-08

    IPC分类号: G06F9/46

    摘要: A system for processing a batch job comprises a processor and a memory. The processor is configured to receive a batch job comprising a sequential or parallel flow of operations, wherein each operation has a defined input type and a defined output type. The processor is further configured to verify that the batch job can run successfully, wherein verifying includes checking that a first operation output defined type is compatible with a second operation input defined type when a first operation output is connected to a second operation input, and wherein verifying includes checking that a parameter used by a calculation in an operation is input to the operation. The memory is coupled to the processor and configured to provide the processor with instructions.

    摘要翻译: 用于处理批处理作业的系统包括处理器和存储器。 处理器被配置为接收包括顺序或并行的操作流的批处理作业,其中每个操作具有定义的输入类型和定义的输出类型。 处理器还被配置为验证批处理作业可以成功运行,其中,当第一操作输出连接到第二操作输入时,验证包括检查第一操作输出定义类型是否与第二操作输入定义类型兼容,并且其中 验证包括检查操作中的计算使用的参数是否被输入到操作中。 存储器耦合到处理器并且被配置为向处理器提供指令。

    System for partitioning batch processes
    5.
    发明授权
    System for partitioning batch processes 有权
    用于分批批处理的系统

    公开(公告)号:US08769537B1

    公开(公告)日:2014-07-01

    申请号:US13156278

    申请日:2011-06-08

    IPC分类号: G06F9/455 G06F9/46

    CPC分类号: G06F9/46 G06F9/5027

    摘要: A system for processing a batch job comprises a processor and a memory. The processor is configured to receive a job name for a job submitted to execute, to receive one or more job parameters, and to determine one or more nodes to run the job. The processor is configured to determine one or steps, where for each step: a step is executed on a node using a state of data associated with a start state of the step; and upon completion of executing the step, a result is stored to a durable storage. The durable storage stores the state of data associated with the start state of the step and the completion state of the step and are accessible by other execution processes as associated with either the start state of the step or the completion state of the step. The memory of the system is coupled to the processor and configured to provide processor with instructions.

    摘要翻译: 用于处理批处理作业的系统包括处理器和存储器。 处理器被配置为接收为执行提交的作业的作业名,以接收一个或多个作业参数,并且确定一个或多个节点来运行作业。 处理器被配置为确定一个或多个步骤,其中对于每个步骤:使用与步骤的开始状态相关联的数据状态在节点上执行步骤; 并且在执行步骤完成时,将结果存储到耐用存储器中。 持久存储器存储与步骤的开始状态和步骤的完成状态相关联的数据的状态,并且可以由步骤的开始状态或步骤的完成状态相关联的其他执行过程访问。 系统的存储器耦合到处理器并且被配置为向处理器提供指令。

    Pocket case for storing and dispensing personal items
    7.
    发明授权
    Pocket case for storing and dispensing personal items 失效
    用于储存和分发个人物品的口袋

    公开(公告)号:US07588141B1

    公开(公告)日:2009-09-15

    申请号:US12148881

    申请日:2008-04-23

    申请人: Kevin Chan

    发明人: Kevin Chan

    IPC分类号: B65D85/14

    CPC分类号: B65D83/0418 A61F6/005

    摘要: A pocket sized case for storing and dispensing condoms wherein a plurality of packaged condoms can be stored and dispensed without risk of breakage.

    摘要翻译: 一种用于存储和分发避孕套的口袋大小的盒子,其中可以存储和分配多个包装的避孕套而没有破损的风险。

    Method and apparatus for low overhead network protocol performance assessment
    8.
    发明授权
    Method and apparatus for low overhead network protocol performance assessment 有权
    低架构网络协议性能评估的方法和装置

    公开(公告)号:US07573829B2

    公开(公告)日:2009-08-11

    申请号:US11224797

    申请日:2005-09-12

    IPC分类号: G01R31/08 G06F15/16

    摘要: A method and apparatus for testing network performance are provided. In data provided by an application on a first host for transport or communication to an application associated with a second host according to a first data transport protocol is intercepted at the first host and wrapped or encapsulated in a test data packet formatted according to a second data transport protocol. The test data packet formatted according to the second data transport protocol includes, in addition to data comprising all or a portion of the original data packet, instrumentation information. The test data packet is then delivered to the second host, which unpacks the original data packet and the instrumentation information. A response packet containing instrumentation information may be sent from the second host to the first host to provide roundtrip performance metrics.

    摘要翻译: 提供了一种用于测试网络性能的方法和装置。 在由第一主机上的应用提供的用于根据第一数据传输协议传输或与第二主机相关联的应用的通信提供的数据在第一主机处被截取并被封装或封装在根据第二数据格式化的测试数据分组中 传输协议。 根据第二数据传输协议格式化的测试数据分组除了包括原始数据分组的全部或一部分的数据之外还包括仪器信息。 然后将测试数据分组传送到第二主机,其分离原始数据分组和仪器信息。 可以将包含仪表信息的响应分组从第二主机发送到第一主机以提供往返性能度量。

    Client customizable interactive voice response system
    9.
    发明授权
    Client customizable interactive voice response system 有权
    客户定制的交互式语音应答系统

    公开(公告)号:US07515695B1

    公开(公告)日:2009-04-07

    申请号:US10736923

    申请日:2003-12-15

    IPC分类号: H04M11/06

    CPC分类号: H04M3/493 H04M2203/355

    摘要: An Interactive Voice Response unit (IVR) is provided that includes a menu structure comprising a plurality of menus, each menu comprising a plurality of options that are selectable by a user, wherein the plurality of menus and each menu's respective plurality of options define a plurality of potential navigation paths for the user through the menu structure and a processor operable to receive, from the user, a request to change the menu structure; effect the requested change to the menu structure; and associate the changed menu structure with the requesting user.

    摘要翻译: 提供了一种交互式语音应答单元(IVR),其包括包括多个菜单的菜单结构,每个菜单包括可由用户选择的多个选项,其中多个菜单和每个菜单的相应多个选项定义多个 通过菜单结构为用户提供潜在的导航路径;以及处理器,可操作以从用户接收改变菜单结构的请求; 影响菜单结构所要求的更改; 并将改变的菜单结构与请求用户相关联。

    HETERO-INTEGRATED STRAINED SILICON n- AND p- MOSFETS
    10.
    发明申请
    HETERO-INTEGRATED STRAINED SILICON n- AND p- MOSFETS 有权
    HETERO-INTEGRATED应变硅n-和p- MOSFET

    公开(公告)号:US20070278517A1

    公开(公告)日:2007-12-06

    申请号:US11840029

    申请日:2007-08-16

    IPC分类号: H01L35/26 H01L21/20

    摘要: The present invention provides semiconductor structures and a method of fabricating such structures for application of MOSFET devices. The semiconductor structures are fabricated in such a way so that the layer structure in the regions of the wafer where n-MOSFETs are fabricated is different from the layer structure in regions of the wafers where p-MOSFETs are fabricated. The structures are fabricated by first forming a damaged region with a surface of a Si-containing substrate by ion implanting of a light atom such as He. A strained SiGe alloy is then formed on the Si-containing substrate containing the damaged region. An annealing step is then employed to cause substantial relaxation of the strained SiGe alloy via a defect initiated strain relaxation. Next, a strained semiconductor cap such as strained Si is formed on the relaxed SiGe alloy.

    摘要翻译: 本发明提供半导体结构和制造用于施加MOSFET器件的这种结构的方法。 以这样的方式制造半导体结构,使得制造n-MOSFET的晶片区域中的层结构不同于制造p-MOSFET的晶片的区域中的层结构。 通过首先通过离子注入诸如He的光原子形成具有含Si衬底的表面的损伤区域来制造结构。 然后在含有受损区域的含Si衬底上形成应变SiGe合金。 然后采用退火步骤通过缺陷引发的应变弛豫引起应变SiGe合金的显着松弛。 接下来,在弛豫的SiGe合金上形成诸如应变Si的应变半导体盖。