公开(公告)号：US20240255559A1

公开(公告)日：2024-08-01

申请号：US18102646

申请日：2023-01-27

Applicant: Apple Inc.

Inventor： Syed Ahmed Aamir ,  Timo W. Gossmann

IPC: G01R29/08 ,  G01R19/10 ,  H04B17/10

CPC classification number: G01R29/0878 ,  G01R19/10 ,  H04B17/102

Abstract: A power detector for measuring the radio frequency (RF) power of RF signals generated by a transmitter or a power amplifier of a transmitter is connected between two diodes of electrostatic discharge (ESD) circuitry that is connected to a signal pathway utilized to transmit the RF signals.

公开(公告)号：US20250021121A1

公开(公告)日：2025-01-16

申请号：US18349792

申请日：2023-07-10

Applicant: Apple Inc.

Inventor： Adrien Vargas ,  Jerome Casters ,  Guillaume Gourlat ,  Timo W. Gossmann ,  Mina Mofreh Gad Elsayed Abdallah

IPC: G05F1/575 ,  H03K17/687 ,  H03K19/173 ,  H04B1/40

Abstract: Voltage regulator circuitry is provided that includes a pass transistor, an error amplifier for regulating the pass transistor, a high rail switch coupled between a first power supply line and the pass transistor, a big low rail switch coupled between a second power supply line and the pass transistor, a small low rail switch coupled between the second power supply line and the pass transistor, and a comparator for monitor a current flowing through or a voltage across the small low rail switch. The small low rail switch, the comparator, and a gating logic can be coupled in an analog feedback loop. The voltage regulator circuitry can include a sequencer for controlling the high rail switch, the big low rail switch, and the gating logic to perform fast seamless transitions between a low voltage rail mode and a high voltage rail mode without incurring large current glitches.

公开(公告)号：US20240348258A1

公开(公告)日：2024-10-17

申请号：US18755317

申请日：2024-06-26

Applicant: Apple Inc.

Inventor： Filipe Tabarani ,  Timo W. Gossmann

IPC: H03M1/00 ,  H03M1/06 ,  H04L27/20 ,  H04L27/36 ,  H03M1/66

CPC classification number: H03M1/002 ,  H03M1/0648 ,  H04L27/206 ,  H04L27/362 ,  H03M1/66

Abstract: The current disclosure is related to a column and line digital-to-analog converter (DAC) with a hybrid coupler for generating quadrature analog signals. The DAC may include an array of unit power amplifiers (cells). A first portion of the cells of the array may be coupled to a first column decoder to receive in-phase components of digital signals and a second portion of the cells may be coupled to a second column decoder to receive quadrature components of the digital signals. The first portion of the cells of the array may generate in-phase components of analog signals and the second portion of the cells of the array may generate quadrature components of the analog signals. A hybrid coupler of the DAC may receive the in-phase and quadrature components of the analog signals with a similar phase, delay the quadrature components by a phase delay (e.g., 90 degrees), and output the resulting analog signals.

公开(公告)号：US20250035688A1

公开(公告)日：2025-01-30

申请号：US18360380

申请日：2023-07-27

Applicant: Apple Inc.

Inventor： Timo W. Gossmann

IPC: G01R27/26

Abstract: Wireless circuitry is provided that includes a transformer having a primary coil and a secondary coil, a first group of switchable capacitors coupled to a first terminal of the primary coil, a second group of switchable capacitors coupled to a second terminal of the primary coil, and capacitance measurement circuitry selectively coupled to a center tap of the primary coil during a measurement mode. The capacitance measurement circuitry can include a current source, a current sink, a comparator, a voltage generator for providing one or more threshold/reference voltages to the comparator, a frequency measurement circuit, and a capacitance calculation circuit configured to compute a capacitance of the first and second groups of switchable capacitors.

公开(公告)号：US20240248504A1

公开(公告)日：2024-07-25

申请号：US18099752

申请日：2023-01-20

Applicant: Apple Inc.

Inventor： Adrien F. Vargas ,  Timo W. Gossmann ,  Sebastian Reinhold

IPC: G05F1/59 ,  H04B1/40

CPC classification number: G05F1/59 ,  H04B1/40

Abstract: This disclosure is directed to a hybrid low dropout voltage regulator circuit, hereinafter referred to as the LDO, including a flipped voltage follower (FVF), coarse grain voltage adjustment circuitry, and fine grain voltage adjustment circuitry. The LDO may provide an output voltage based on receiving a reference voltage. The flipped voltage follower may supply the output voltage to one or more other electronic circuits. The coarse grain voltage adjustment circuitry and the fine grain voltage adjustment circuitry may adjust the output voltage based on a desired voltage level. The LDO may use feedback signals, feedforward signals, or both to provide the output voltage.

公开(公告)号：US20240028059A1

公开(公告)日：2024-01-25

申请号：US17872989

申请日：2022-07-25

Applicant: Apple Inc.

Inventor： Antonio Passamani ,  Timo W. Gossmann ,  Adrien F. Vargas ,  Guillaume Gourlat

IPC: G05F1/46 ,  G05F1/56 ,  G05F1/575 ,  H03M1/66 ,  H03F3/45

CPC classification number: G05F1/468 ,  G05F1/561 ,  G05F1/575 ,  H03M1/66 ,  H03F3/45071

Abstract: The present disclosure relates to power management for digital-to-analog converters (DACs). As electronic devices and the components therein become increasingly smaller to satisfy the desire for more compact/portable devices, the operating voltage may be reduced to reduce the likelihood of shorts and/or voltage/current bleeds. To maintain comparable power output with the reduced operating voltage, the current may increase proportionally to the decrease in voltage. Consequently, in scaled devices and applications, high-current low-voltage regulators may be beneficial. As such, a low-dropout regulator (LDO) including one or more operational amplifiers and multiple pass devices may be implemented between a power supply and the DAC to regulate the power supply to the DAC. Moreover, the LDO may include one or more feedback loops to maintain a desired voltage regulation of the pass devices.