公开(公告)号：US09698797B1

公开(公告)日：2017-07-04

申请号：US15210852

申请日：2016-07-14

Applicant: Apple Inc.

Inventor： Manu Gulati ,  Suhas Kumar Suvarna Ramesh ,  Venkata Ramana Malladi ,  Thomas H. Huang ,  Rakesh L. Notani ,  Robert E. Jeter ,  Kai Lun Hsiung

IPC: H03L7/00 ,  H03L7/07 ,  H03L7/099

CPC classification number: H03L7/23

Abstract: Techniques are disclosed relating to feedback-controlled oscillators (e.g., phase-locked loops) arranged in two or more levels. In some embodiments, in a relatively higher-frequency mode, a first level feedback-controlled oscillator provides reference signals to one or more second level feedback-controlled oscillators that in turn generate output clock signals to clock sequential circuitry. In some embodiments, in a relatively lower-frequency mode, the first level feedback-controlled oscillator bypasses the second level feedback-controlled oscillators and provides output clock signals directly to sequential circuitry (without using any intervening feedback-controlled oscillators).