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    METHOD OF FORMING A MOLDED SUBSTRATE ELECTRONIC PACKAGE AND STRUCTURE
    1.
    发明申请
    METHOD OF FORMING A MOLDED SUBSTRATE ELECTRONIC PACKAGE AND STRUCTURE 有权

    公开(公告)号：US20210106156A1

    公开(公告)日：2021-04-15

    申请号：US17130182

    申请日：2020-12-22

    申请人： Amkor Technology Singapore Holding Pte. Ltd.

    发明人： Won Bae BANG ,  Byong Jin KIM ,  Gi Jeong KIM ,  Ji Young CHUNG

    IPC分类号： A47G9/10 ,  A47G9/02

    摘要： An electronic package includes a substrate having a plurality of lands embedded within an insulating layer. Conductive patterns are disposed on at least a portion of a respective land top surface. An electronic device is electrically connected to the conductive patterns, wherein the land bottom surfaces are exposed to the outside. In another embodiment, the top land surfaces and the top surface of the insulating layer are substantially co-planar and the conductive patterns further overlap portions of the top surface of the insulating layer. In one embodiment, a package body encapsulates the top surface of the insulating material and the electronic device, wherein the land bottom surfaces are exposed to the outside of the package body.

    METHOD OF FORMING A MOLDED SUBSTRATE ELECTRONIC PACKAGE AND STRUCTURE
    2.
    发明公开
    METHOD OF FORMING A MOLDED SUBSTRATE ELECTRONIC PACKAGE AND STRUCTURE 有权

    公开(公告)号：US20230240457A9

    公开(公告)日：2023-08-03

    申请号：US17130182

    申请日：2020-12-22

    申请人： Amkor Technology Singapore Holding Pte. Ltd.

    发明人： Won Bae BANG ,  Byong Jin KIM ,  Gi Jeong KIM ,  Ji Young CHUNG

    IPC分类号： A47G9/10 ,  A47G9/02

    CPC分类号： A47G9/10 ,  A47G2009/1018 ,  A47G9/0253

    摘要： An electronic package includes a substrate having a plurality of lands embedded within an insulating layer. Conductive patterns are disposed on at least a portion of a respective land top surface. An electronic device is electrically connected to the conductive patterns, wherein the land bottom surfaces are exposed to the outside. In another embodiment, the top land surfaces and the top surface of the insulating layer are substantially co-planar and the conductive patterns further overlap portions of the top surface of the insulating layer. In one embodiment, a package body encapsulates the top surface of the insulating material and the electronic device, wherein the land bottom surfaces are exposed to the outside of the package body.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220246542A1

    公开(公告)日：2022-08-04

    申请号：US17725260

    申请日：2022-04-20

    申请人： Amkor Technology Singapore Holding Pte. Ltd.

    发明人： Ji Young CHUNG ,  Jae Ho LEE ,  Byong Il HEO

    IPC分类号： H01L23/552 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56 ,  H01L25/065 ,  H01L23/498

    摘要： In one example, an electronic device structure includes a substrate having a conductive structure adjacent to a surface. The conductive structure can include a plurality of conductive traces. First and second electronic devices are disposed adjacent to the top surface. The first electronic device is interposed between a first conductive trace and a second conductive trace, and the second electronic device is interposed between the second conductive trace and a third conductive trace. A continuous wire structure including a first bond structure is connected to the first conductive trace, a second bond structure is connected to the second conductive trace, a third bond structure is connected to the third conductive trace, a first wire portion is interconnected between the first bond structure and the second bond structure and disposed to overlie the first electronic device, and a second wire portion is interconnected between the second bond structure and the third bond structure and disposed to overlie the second electronic device. Other examples and related methods are also disclosed herein.

    LAND STRUCTURE FOR SEMICONDUCTOR PACKAGE AND METHOD THEREFOR
    6.
    发明申请
    LAND STRUCTURE FOR SEMICONDUCTOR PACKAGE AND METHOD THEREFOR 有权

    公开(公告)号：US20210242113A1

    公开(公告)日：2021-08-05

    申请号：US17233778

    申请日：2021-04-19

    申请人： Amkor Technology Singapore Holding Pte. Ltd.

    发明人： Kyoung Yeon LEE ,  Byong Jin KIM ,  Jae Min BAE ,  Hyung Il JEON ,  Gi Jeong KIM ,  Ji Young CHUNG

    IPC分类号： H01L23/495 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48

    摘要： A semiconductor package structure includes a substrate comprising a land structure. The land structure includes a first land section having a first height in a cross-sectional view and a second land section having a second height in the cross-sectional view that is different than the first height. A mold encapsulant is disposed adjacent a lateral portion of the first land section and is disposed below a bottom portion of the second land section. A semiconductor die is attached to the substrate, and includes a first major surface, a second major surface opposing the first major surface, and an outer perimeter. The semiconductor die further includes a bonding structure disposed adjacent the first major surface, which is coupled to the second land section such that the first land section is disposed outside the perimeter of the semiconductor die A mold member encapsulates at least portions of the semiconductor die.