-
公开(公告)号:US11869829B2
公开(公告)日:2024-01-09
申请号:US16925599
申请日:2020-07-10
发明人: Dong Joo Park , Jin Seong Kim , Ki Wook Lee , Dae Byoung Kang , Ho Choi , Kwang Ho Kim , Jae Dong Kim , Yeon Soo Jung , Sung Hwan Cho
IPC分类号: H01L23/482 , H01L23/498 , H01L25/065 , H01L23/48 , H01L23/31 , H01L25/03 , H01L23/00 , H01L25/10 , H01L23/538
CPC分类号: H01L23/482 , H01L23/3128 , H01L23/481 , H01L23/49816 , H01L23/49827 , H01L24/73 , H01L25/03 , H01L25/0657 , H01L25/10 , H01L23/5389 , H01L24/16 , H01L24/24 , H01L24/32 , H01L2224/04105 , H01L2224/06181 , H01L2224/13025 , H01L2224/16227 , H01L2224/16237 , H01L2224/16238 , H01L2224/17181 , H01L2224/244 , H01L2224/24227 , H01L2224/32145 , H01L2224/32225 , H01L2224/73253 , H01L2224/73259 , H01L2224/73265 , H01L2224/73267 , H01L2224/81191 , H01L2224/92224 , H01L2225/0651 , H01L2225/06517 , H01L2225/06548 , H01L2225/06572 , H01L2225/06582 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2924/19107 , H01L2224/73265 , H01L2224/32225 , H01L2224/48227 , H01L2924/00012 , H01L2924/181 , H01L2924/00012
摘要: In accordance with the present description, there is provided multiple embodiments of a semiconductor device. In each embodiment, the semiconductor device comprises a substrate having a conductive pattern formed thereon. In addition to the substrate, each embodiment of the semiconductor device includes at least one semiconductor die which is electrically connected to the substrate, both the semiconductor die and the substrate being at least partially covered by a package body of the semiconductor device. In certain embodiments of the semiconductor device, through-mold vias are formed in the package body to provide electrical signal paths from an exterior surface thereof to the conductive pattern of the substrate. In other embodiments, through mold vias are also included in the package body to provide electrical signal paths between the semiconductor die and an exterior surface of the package body. Other embodiments of the semiconductor device comprise one or more interposers which are electrically connected to the through-mold vias, and may be covered by the package body and/or disposed in spaced relation thereto. In yet other embodiments of the semiconductor device, the interposer may not be electrically connected to the through mold vias, but may have one or more semiconductor dies of the semiconductor device electrically connected thereto.