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    Address circuit
    4.
    发明授权
    Address circuit 有权
    地址电路

    公开(公告)号：US09478312B1

    公开(公告)日：2016-10-25

    申请号：US14580908

    申请日：2014-12-23

    Applicant: Amazon Technologies, Inc.

    Inventor： Carl Ryan Kelso

    IPC: G11C19/00 ,  G11C19/38 ,  G06F12/08 ,  G06F9/06

    CPC classification number: G11C19/00 ,  G06F9/06 ,  G06F12/08 ,  G11C8/04 ,  G11C19/38

    Abstract: Described herein are techniques, systems, and circuits for addressing image data according to blocks. For example, in some cases, the address space may be divided into high order address bits and low order address bits. In these cases, an address circuit may twist an address space by shifting the high order bits and low order bits of an address in a rightward direction, shifting the low order bits of the address in a leftward direction, and shifting the high order bits and the low order bits of the address in the leftward direction. The circuit may modify the address value and untwist the address space. For example, the untwisting may include shifting the high order bits and the low order bits of an address in the rightward direction, shifting the low order bits of the address in the rightward direction, and shifting the high order bits and the low order bits of the address in the leftward direction.

    Abstract translation: 这里描述的是用于根据框来寻址图像数据的技术，系统和电路。 例如，在某些情况下，地址空间可以被划分为高位地址位和低位地址位。 在这些情况下，地址电路可以通过向右移动地址的高位和低位来扭转地址空间，将地址的低位位向左移位，并移位高位位 地址在左边方向的低位位。 电路可以修改地址值并解除地址空间。 例如，解捻可以包括向右移动地址的高阶位和低位，向右移位地址的低位，并将高位和低位位移位 地址在向左方向。

    Address circuit
    7.
    发明授权
    Address circuit 有权

    公开(公告)号：US09805819B1

    公开(公告)日：2017-10-31

    申请号：US15293821

    申请日：2016-10-14

    Applicant: Amazon Technologies, Inc.

    Inventor： Carl Ryan Kelso

    IPC: G06F9/30 ,  G11C19/00 ,  G11C19/38

    CPC classification number: G11C19/00 ,  G06F9/06 ,  G06F12/08 ,  G11C8/04 ,  G11C19/38

    Abstract: Described herein are techniques, systems, and circuits for addressing image data according to blocks. For example, in some cases, the address space may be divided into high order address bits and low order address bits. In these cases, an address circuit may twist an address space by shifting the high order bits and low order bits of an address in a rightward direction, shifting the low order bits of the address in a leftward direction, and shifting the high order bits and the low order bits of the address in the leftward direction. The circuit may modify the address value and untwist the address space. For example, the untwisting may include shifting the high order bits and the low order bits of an address in the rightward direction, shifting the low order bits of the address in the rightward direction, and shifting the high order bits and the low order bits of the address in the leftward direction.

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