公开(公告)号：US07808412B2

公开(公告)日：2010-10-05

申请号：US12389916

申请日：2009-02-20

申请人： Akihiro Fukuzawa ,  Satoru Ito ,  Nobuyuki Imai

发明人： Akihiro Fukuzawa ,  Satoru Ito ,  Nobuyuki Imai

IPC分类号： H03M1/00

CPC分类号： H03G5/24 ,  H03H19/004

摘要： An integrated circuit device includes an amplifier circuit that receives an input signal and performs an offset adjustment corresponding to a DC offset of the input signal and a gain adjustment corresponding to an amplitude of the input signal, a filter that is provided in a subsequent stage of the amplifier circuit, a cut-off frequency of the filter being variably set corresponding to a frequency band of the input signal, an A/D converter that is provided in a subsequent stage of the filter and performs an A/D conversion process on a signal amplified by the amplifier circuit, and a control circuit that sets an offset adjustment of the amplifier circuit, a gain adjustment of the amplifier circuit, and the cut-off frequency of the filter.

摘要翻译： 集成电路装置包括：放大器电路，其接收输入信号并执行与输入信号的DC偏移相对应的偏移调整和对应于输入信号的幅度的增益调整;滤波器，其被设置在 所述放大器电路，对应于所述输入信号的频带可变地设置所述滤波器的截止频率; A / D转换器，其设置在所述滤波器的后续级中，并对所述滤波器进行A / D转换处理 由放大器电路放大的信号，以及设置放大器电路的偏移调整，放大器电路的增益调整和滤波器的截止频率的控制电路。

公开(公告)号：US07804432B2

公开(公告)日：2010-09-28

申请号：US12389782

申请日：2009-02-20

申请人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

发明人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

IPC分类号： H03M1/06

CPC分类号： H03M1/1019 ,  H03F3/45475 ,  H03F3/45928 ,  H03F2200/405 ,  H03F2200/408 ,  H03F2203/45136 ,  H03F2203/45138 ,  H03F2203/45522 ,  H03F2203/45586 ,  H03F2203/45588 ,  H03M1/183

摘要： An integrated circuit device includes an amplifier circuit that includes first to Nth amplifiers, an A/D converter, first to Nth offset adjustment registers that are provided corresponding to the first to Nth amplifiers and store first to Nth offset adjustment data, first to Nth D/A converters provided corresponding to the first to Nth amplifiers, first to Nth offset value storage sections that store first to Nth offset value data, and a control circuit that calculates the first to Nth offset adjustment data based on the first to Nth offset value data, and sets the first to Nth offset adjustment data in the first to Nth offset adjustment registers.

摘要翻译： 集成电路装置包括放大器电路，其包括第一至第N放大器，A / D转换器，对应于第一至第N放大器提供的第一至第N偏移调整寄存器，并存储第一至第N偏移调整数据，第一至第N D / A转换器，其对应于存储第一至第N偏移值数据的第一至第N放大器，第一至第N偏移值存储部分，以及控制电路，其基于第一至第N偏移值数据计算第一至第N偏移调整数据 并且在第一至第N偏移调整寄存器中设置第一至第N偏移调整数据。

公开(公告)号：US20090160692A1

公开(公告)日：2009-06-25

申请号：US12338547

申请日：2008-12-18

申请人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

发明人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

IPC分类号： H03M1/12

CPC分类号： H03M1/186

摘要： An A/D conversion circuit includes an amplifier circuit that includes a plurality of amplifiers that are cascaded, a selector that selects one of output signals output from the plurality of amplifiers and outputs the selected output signal as a selector output signal, an A/D converter that A/D-converts the selector output signal output from the selector, a determination circuit that determines whether or not a voltage of the output signal output from each of the plurality of amplifiers is within a determination voltage range specified by a high-potential-side determination voltage and a low-potential-side determination voltage, and a control circuit that instructs the selector to select one of the output signals output from the plurality of amplifiers based on the determination result of the determination circuit.

摘要翻译： A / D转换电路包括：放大器电路，其包括级联的多个放大器;选择器，其选择从多个放大器输出的输出信号中的一个，并输出所选择的输出信号作为选择器输出信号; A / D 转换器，其对从选择器输出的选择器输出信号进行A / D转换，确定电路，确定从多个放大器中的每一个输出的输出信号的电压是否在由高电位指定的确定电压范围内 以及控制电路，其指示选择器基于确定电路的确定结果来选择从多个放大器输出的输出信号之一。

公开(公告)号：US07924202B2

公开(公告)日：2011-04-12

申请号：US12389681

申请日：2009-02-20

申请人： Akihiro Fukuzawa ,  Satoru Ito ,  Nobuyuki Imai

发明人： Akihiro Fukuzawa ,  Satoru Ito ,  Nobuyuki Imai

IPC分类号： H03M1/12

CPC分类号： H03F3/45475 ,  G01D3/022 ,  H03F3/45977 ,  H03F2203/45138 ,  H03F2203/45212 ,  H03F2203/45522 ,  H03G3/30

摘要： An integrated circuit device includes an amplifier circuit that includes first to Nth amplifiers that are cascaded and receives an input signal, an A/D converter that performs an A/D conversion process on a signal amplified by the amplifier circuit, first to Nth D/A converters that are provided corresponding to the first to Nth amplifiers and used to perform an offset adjustment of the first to Nth amplifiers, and a control circuit that sets an offset adjustment of the first to Nth amplifiers using the first to Nth D/A converters and a gain adjustment of the first to Nth amplifiers.

摘要翻译： 集成电路装置包括放大电路，其包括级联并接收输入信号的第一至第N放大器，对由放大器电路放大的信号执行A / D转换处理的A / D转换器，第一至第N / A转换器，其对应于第一至第N放大器提供并用于执行第一至第N放大器的偏移调整;以及控制电路，其使用第一至第N D / A转换器设置第一至第N放大器的偏移调整 以及第一至第N放大器的增益调整。

公开(公告)号：US07808414B2

公开(公告)日：2010-10-05

申请号：US12343796

申请日：2008-12-24

申请人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

发明人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

IPC分类号： H03M3/00

CPC分类号： H03M1/002 ,  H03M1/66

摘要： An A/D conversion circuit includes a continuous-time filter that performs a filtering process on an input signal, an SCF that is provided in a subsequent stage of the continuous-time filter and performs a filtering process utilizing the continuous-time filter as a prefilter, a cut-off frequency of the SCF being variably set corresponding to a frequency band of the input signal, an A/D converter that is provided in a subsequent stage of the SCF and performs an A/D conversion operation utilizing the continuous-time filter and the SCF as prefilters, and a digital filter that is provided in a subsequent stage of the A/D converter and performs a digital filtering process utilizing the continuous-time filter and the SCF as prefilters, a cut-off frequency of the digital filter being variably set corresponding to the frequency band of the input signal.

摘要翻译： A / D转换电路包括对输入信号执行滤波处理的连续时间滤波器，在连续时间滤波器的后续级中提供的SCF，并且使用连续时间滤波器作为滤波处理 预滤波器，对应于输入信号的频带可变地设定的SCF的截止频率，设置在SCF的后续级中的A / D转换器，并利用连续输出信号进行A / D转换操作， 时间滤波器和作为前置滤波器的SCF，以及在A / D转换器的后续级中提供的数字滤波器，并且使用连续时间滤波器和SCF作为预滤波器执行数字滤波处理，截止频率为 数字滤波器根据输入信号的频带可变地设定。

公开(公告)号：US07786918B2

公开(公告)日：2010-08-31

申请号：US12338547

申请日：2008-12-18

申请人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

发明人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

IPC分类号： H03M1/12

CPC分类号： H03M1/186

摘要： An A/D conversion circuit includes an amplifier circuit that includes a plurality of amplifiers that are cascaded, a selector that selects one of output signals output from the plurality of amplifiers and outputs the selected output signal as a selector output signal, an A/D converter that A/D-converts the selector output signal output from the selector, a determination circuit that determines whether or not a voltage of the output signal output from each of the plurality of amplifiers is within a determination voltage range specified by a high-potential-side determination voltage and a low-potential-side determination voltage, and a control circuit that instructs the selector to select one of the output signals output from the plurality of amplifiers based on the determination result of the determination circuit.

摘要翻译： A / D转换电路包括：放大器电路，其包括级联的多个放大器;选择器，其选择从多个放大器输出的输出信号中的一个，并输出所选择的输出信号作为选择器输出信号; A / D 转换器，其对从选择器输出的选择器输出信号进行A / D转换，确定电路，确定从多个放大器中的每一个输出的输出信号的电压是否在由高电位指定的确定电压范围内 以及控制电路，其指示选择器基于确定电路的确定结果来选择从多个放大器输出的输出信号之一。

公开(公告)号：US07687961B2

公开(公告)日：2010-03-30

申请号：US11362101

申请日：2006-02-27

申请人： Tadanobu Takahashi ,  Nobuyuki Imai ,  Shin Aoki ,  Daijiro Takizawa

发明人： Tadanobu Takahashi ,  Nobuyuki Imai ,  Shin Aoki ,  Daijiro Takizawa

IPC分类号： H02K1/00

CPC分类号： H02K21/145 ,  H02K1/20 ,  H02K15/022 ,  H02K21/227 ,  H02K2201/12

摘要： A stator includes mutually independent annular coils and of two phases and teeth and of three phases.

摘要翻译： 定子包括相互独立的环形线圈和两相和三相的三相。

公开(公告)号：US07608972B2

公开(公告)日：2009-10-27

申请号：US11541525

申请日：2006-10-03

申请人： Shin Aoki ,  Nobuyuki Imai ,  Tadanobu Takahashi ,  Daijiro Takizawa

发明人： Shin Aoki ,  Nobuyuki Imai ,  Tadanobu Takahashi ,  Daijiro Takizawa

IPC分类号： H02K1/12 ,  H02K21/14

CPC分类号： H02K1/145 ,  H02K21/16

摘要： A claw-pole motor includes a rotor having permanent magnets; and a stator having stator rings assigned to three phases, which are coaxially stacked along the same axis. Winding attachment portions are formed between adjacent stator rings, and an annular winding is installed in each winding attachment portion for generating a magnetic field for rotating the rotor. Each stator ring has a main body and claw-shaped induction poles which protrude from the main body in radial directions. The claw-shaped induction poles of the three phases are serially arranged along a circumference of the stator rings and also face the permanent magnets. An interval between adjacent claw-shaped induction poles along the circumference of predetermined two of the stator rings of the three phases is smaller than an interval between adjacent claw-shaped induction poles along the circumference of any other pair of the stator rings.

摘要翻译： 爪极马达包括具有永磁体的转子; 以及具有分配给三相的定子环的定子，其沿同一轴同轴地堆叠。 在相邻的定子环之间形成绕组附接部分，并且在每个绕组附接部分中安装环形绕组，用于产生用于旋转转子的磁场。 每个定子环具有从主体沿径向突出的主体和爪形感应磁极。 三相的爪形感应磁极沿着定子环的圆周方向排列并且也与永磁体相对。 沿着三相定子环的预定的两个定子环的圆周的相邻的爪形感应磁极之间的间隔小于沿着任何另一对定子环的圆周的相邻的爪形感应磁极之间的间隔。

公开(公告)号：US07440702B2

公开(公告)日：2008-10-21

申请号：US10914717

申请日：2004-08-09

申请人： Nobuyuki Imai

发明人： Nobuyuki Imai

IPC分类号： H04B10/12

CPC分类号： H04L25/14

摘要： A multiplexer of a transmission section generates a clock signal by multiplying a reference clock signal of a digital image signal by a predetermined number ‘K’. A parallel digital image signal is converted into a serial digital signal on the basis of the clock signal, and the serial digital signal is converted into an optical signal in an optical transmission section for transmitting. A demultiplexer extracts a reception clock signal from a serial digital reception signal which is converted into an electric signal in an optical reception section of a reception section, the serial digital reception signal is converted into a parallel signal and a signal corresponding to the parallel digital image signal on the basis of the reception clock signal, and a clock signal corresponding to the reference clock signal is recovered by multiplying the reception clock signal by ‘1/K’.

摘要翻译： 传输部分的多路复用器通过将数字图像信号的参考时钟信号乘以预定数量'K'来产生时钟信号。 并行数字图像信号根据时钟信号转换为串行数字信号，串行数字信号在光传输部分转换为光信号，用于传输。 解复用器从在接收部分的光接收部分中转换成电信号的串行数字接收信号提取接收时钟信号，将串行数字接收信号转换成并行信号和对应于并行数字图像的信号 基于接收时钟信号的信号，并且通过将接收时钟信号乘以'1 / K'来恢复与参考时钟信号相对应的时钟信号。

公开(公告)号：US07400101B2

公开(公告)日：2008-07-15

申请号：US11246242

申请日：2005-10-11

申请人： Nobuyuki Imai ,  Yutaka Takahashi ,  Tomohiro Shiraishi ,  Hajime Kondoh

发明人： Nobuyuki Imai ,  Yutaka Takahashi ,  Tomohiro Shiraishi ,  Hajime Kondoh

IPC分类号： H02K29/00

CPC分类号： H02P21/0003

摘要： A method and an apparatus accurately detect a rotor angle of a DC brushless motor by using a first-order difference of a detected value of a phase current. A periodic signal causing the total sum of output voltages in three control cycles to become zero is superposed over a drive voltage under current feedback control. The drive voltage is held at a constant level during the three control cycles. The phase difference between an actual value and an estimated value of a rotor angle is calculated, using the first-order differential current in each control cycle, and the estimated value of the rotor angle is calculated by follow-up computation of an observer, using the phase difference.

摘要翻译： 一种方法和装置通过使用相电流的检测值的一阶差来精确地检测直流无刷电动机的转子角度。 在三个控制周期内使输出电压的总和变为零的周期信号在电流反馈控制下的驱动电压上叠加。 在三个控制周期期间，驱动电压保持恒定。 使用每个控制周期中的一阶差分电流来计算实际值和转子角度的估计值之间的相位差，并且通过观察者的跟踪计算来计算转子角度的估计值，使用 相位差。