公开(公告)号：US07924202B2

公开(公告)日：2011-04-12

申请号：US12389681

申请日：2009-02-20

申请人： Akihiro Fukuzawa ,  Satoru Ito ,  Nobuyuki Imai

发明人： Akihiro Fukuzawa ,  Satoru Ito ,  Nobuyuki Imai

IPC分类号： H03M1/12

CPC分类号： H03F3/45475 ,  G01D3/022 ,  H03F3/45977 ,  H03F2203/45138 ,  H03F2203/45212 ,  H03F2203/45522 ,  H03G3/30

摘要： An integrated circuit device includes an amplifier circuit that includes first to Nth amplifiers that are cascaded and receives an input signal, an A/D converter that performs an A/D conversion process on a signal amplified by the amplifier circuit, first to Nth D/A converters that are provided corresponding to the first to Nth amplifiers and used to perform an offset adjustment of the first to Nth amplifiers, and a control circuit that sets an offset adjustment of the first to Nth amplifiers using the first to Nth D/A converters and a gain adjustment of the first to Nth amplifiers.

摘要翻译： 集成电路装置包括放大电路，其包括级联并接收输入信号的第一至第N放大器，对由放大器电路放大的信号执行A / D转换处理的A / D转换器，第一至第N / A转换器，其对应于第一至第N放大器提供并用于执行第一至第N放大器的偏移调整;以及控制电路，其使用第一至第N D / A转换器设置第一至第N放大器的偏移调整 以及第一至第N放大器的增益调整。

公开(公告)号：US07804432B2

公开(公告)日：2010-09-28

申请号：US12389782

申请日：2009-02-20

申请人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

发明人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

IPC分类号： H03M1/06

CPC分类号： H03M1/1019 ,  H03F3/45475 ,  H03F3/45928 ,  H03F2200/405 ,  H03F2200/408 ,  H03F2203/45136 ,  H03F2203/45138 ,  H03F2203/45522 ,  H03F2203/45586 ,  H03F2203/45588 ,  H03M1/183

摘要： An integrated circuit device includes an amplifier circuit that includes first to Nth amplifiers, an A/D converter, first to Nth offset adjustment registers that are provided corresponding to the first to Nth amplifiers and store first to Nth offset adjustment data, first to Nth D/A converters provided corresponding to the first to Nth amplifiers, first to Nth offset value storage sections that store first to Nth offset value data, and a control circuit that calculates the first to Nth offset adjustment data based on the first to Nth offset value data, and sets the first to Nth offset adjustment data in the first to Nth offset adjustment registers.

摘要翻译： 集成电路装置包括放大器电路，其包括第一至第N放大器，A / D转换器，对应于第一至第N放大器提供的第一至第N偏移调整寄存器，并存储第一至第N偏移调整数据，第一至第N D / A转换器，其对应于存储第一至第N偏移值数据的第一至第N放大器，第一至第N偏移值存储部分，以及控制电路，其基于第一至第N偏移值数据计算第一至第N偏移调整数据 并且在第一至第N偏移调整寄存器中设置第一至第N偏移调整数据。

公开(公告)号：US20090160692A1

公开(公告)日：2009-06-25

申请号：US12338547

申请日：2008-12-18

申请人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

发明人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

IPC分类号： H03M1/12

CPC分类号： H03M1/186

摘要： An A/D conversion circuit includes an amplifier circuit that includes a plurality of amplifiers that are cascaded, a selector that selects one of output signals output from the plurality of amplifiers and outputs the selected output signal as a selector output signal, an A/D converter that A/D-converts the selector output signal output from the selector, a determination circuit that determines whether or not a voltage of the output signal output from each of the plurality of amplifiers is within a determination voltage range specified by a high-potential-side determination voltage and a low-potential-side determination voltage, and a control circuit that instructs the selector to select one of the output signals output from the plurality of amplifiers based on the determination result of the determination circuit.

摘要翻译： A / D转换电路包括：放大器电路，其包括级联的多个放大器;选择器，其选择从多个放大器输出的输出信号中的一个，并输出所选择的输出信号作为选择器输出信号; A / D 转换器，其对从选择器输出的选择器输出信号进行A / D转换，确定电路，确定从多个放大器中的每一个输出的输出信号的电压是否在由高电位指定的确定电压范围内 以及控制电路，其指示选择器基于确定电路的确定结果来选择从多个放大器输出的输出信号之一。

公开(公告)号：US07808412B2

公开(公告)日：2010-10-05

申请号：US12389916

申请日：2009-02-20

申请人： Akihiro Fukuzawa ,  Satoru Ito ,  Nobuyuki Imai

发明人： Akihiro Fukuzawa ,  Satoru Ito ,  Nobuyuki Imai

IPC分类号： H03M1/00

CPC分类号： H03G5/24 ,  H03H19/004

摘要： An integrated circuit device includes an amplifier circuit that receives an input signal and performs an offset adjustment corresponding to a DC offset of the input signal and a gain adjustment corresponding to an amplitude of the input signal, a filter that is provided in a subsequent stage of the amplifier circuit, a cut-off frequency of the filter being variably set corresponding to a frequency band of the input signal, an A/D converter that is provided in a subsequent stage of the filter and performs an A/D conversion process on a signal amplified by the amplifier circuit, and a control circuit that sets an offset adjustment of the amplifier circuit, a gain adjustment of the amplifier circuit, and the cut-off frequency of the filter.

摘要翻译： 集成电路装置包括：放大器电路，其接收输入信号并执行与输入信号的DC偏移相对应的偏移调整和对应于输入信号的幅度的增益调整;滤波器，其被设置在 所述放大器电路，对应于所述输入信号的频带可变地设置所述滤波器的截止频率; A / D转换器，其设置在所述滤波器的后续级中，并对所述滤波器进行A / D转换处理 由放大器电路放大的信号，以及设置放大器电路的偏移调整，放大器电路的增益调整和滤波器的截止频率的控制电路。

公开(公告)号：US07808414B2

公开(公告)日：2010-10-05

申请号：US12343796

申请日：2008-12-24

申请人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

发明人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

IPC分类号： H03M3/00

CPC分类号： H03M1/002 ,  H03M1/66

摘要： An A/D conversion circuit includes a continuous-time filter that performs a filtering process on an input signal, an SCF that is provided in a subsequent stage of the continuous-time filter and performs a filtering process utilizing the continuous-time filter as a prefilter, a cut-off frequency of the SCF being variably set corresponding to a frequency band of the input signal, an A/D converter that is provided in a subsequent stage of the SCF and performs an A/D conversion operation utilizing the continuous-time filter and the SCF as prefilters, and a digital filter that is provided in a subsequent stage of the A/D converter and performs a digital filtering process utilizing the continuous-time filter and the SCF as prefilters, a cut-off frequency of the digital filter being variably set corresponding to the frequency band of the input signal.

摘要翻译： A / D转换电路包括对输入信号执行滤波处理的连续时间滤波器，在连续时间滤波器的后续级中提供的SCF，并且使用连续时间滤波器作为滤波处理 预滤波器，对应于输入信号的频带可变地设定的SCF的截止频率，设置在SCF的后续级中的A / D转换器，并利用连续输出信号进行A / D转换操作， 时间滤波器和作为前置滤波器的SCF，以及在A / D转换器的后续级中提供的数字滤波器，并且使用连续时间滤波器和SCF作为预滤波器执行数字滤波处理，截止频率为 数字滤波器根据输入信号的频带可变地设定。

公开(公告)号：US07786918B2

公开(公告)日：2010-08-31

申请号：US12338547

申请日：2008-12-18

申请人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

发明人： Akihiro Fukuzawa ,  Nobuyuki Imai ,  Satoru Ito

IPC分类号： H03M1/12

CPC分类号： H03M1/186

摘要： An A/D conversion circuit includes an amplifier circuit that includes a plurality of amplifiers that are cascaded, a selector that selects one of output signals output from the plurality of amplifiers and outputs the selected output signal as a selector output signal, an A/D converter that A/D-converts the selector output signal output from the selector, a determination circuit that determines whether or not a voltage of the output signal output from each of the plurality of amplifiers is within a determination voltage range specified by a high-potential-side determination voltage and a low-potential-side determination voltage, and a control circuit that instructs the selector to select one of the output signals output from the plurality of amplifiers based on the determination result of the determination circuit.

摘要翻译： A / D转换电路包括：放大器电路，其包括级联的多个放大器;选择器，其选择从多个放大器输出的输出信号中的一个，并输出所选择的输出信号作为选择器输出信号; A / D 转换器，其对从选择器输出的选择器输出信号进行A / D转换，确定电路，确定从多个放大器中的每一个输出的输出信号的电压是否在由高电位指定的确定电压范围内 以及控制电路，其指示选择器基于确定电路的确定结果来选择从多个放大器输出的输出信号之一。

公开(公告)号：US07845227B2

公开(公告)日：2010-12-07

申请号：US11979814

申请日：2007-11-08

申请人： Akihiro Fukuzawa

发明人： Akihiro Fukuzawa

IPC分类号： G01P9/04 ,  G01C19/56

CPC分类号： H03F3/45 ,  G01C19/5607 ,  G01C19/5649

摘要： A detection device includes a detection circuit. The detection circuit includes an amplifier circuit, a synchronous detection circuit, and a filter section. The amplifier circuit includes a first-type operational amplifier, and the filter section includes a second-type operational amplifier. When a channel width and a channel length of a differential-stage transistor of a differential section of the first-type operational amplifier are respectively referred to as W1a and L1a, a bias current flowing through the differential section is referred to as Ia, a channel width and a channel length of a differential-stage transistor of a differential section of the second-type operational amplifier are respectively referred to as W1b and L1b, and a bias current flowing through the differential section is referred to as Ib, W1b×L1b>W1a×L1a and Ia>Ib are satisfied.

摘要翻译： 检测装置包括检测电路。 检测电路包括放大器电路，同步检测电路和滤波器部分。 放大器电路包括第一类运算放大器，滤波器部分包括第二类运算放大器。 当第一类型运算放大器的差分部分的差分级晶体管的沟道宽度和沟道长度分别被称为W1a和L1a时，流过差分部分的偏置电流被称为Ia，沟道 第二类运算放大器的差分级的差分级晶体管的宽度和沟道长度分别被称为W1b和L1b，并且流过差分部分的偏置电流被称为Ib，W1b×L1b> W1a×L1a和Ia> Ib。

公开(公告)号：US06208281B1

公开(公告)日：2001-03-27

申请号：US09242924

申请日：1999-05-21

申请人： Keiji Jinbo ,  Akihiro Fukuzawa

发明人： Keiji Jinbo ,  Akihiro Fukuzawa

IPC分类号： H03M178

CPC分类号： H01C10/46 ,  H01L27/0802

摘要： A resistance ladder (10) is formed by connecting together a plurality of resistance groups (12, 14, and 15), each having at least first to third resistors extending in a longitudinal axial direction (20, 30, and 40). In each resistance group (12, 14, and 15), the second and third resistors (30 and 40) are disposed parallel to a longitudinal axial direction X on either side of the first resistor (20). Driver circuits (16, 17 and 18) are connected to the third resistors (40) of the corresponding resistance groups, and are disposed at one end of the longitudinal axial direction X thereof. The first to third resistors (20, 30 and 40) are connected together by a first wiring layer (60) formed on top of an insulation layer (50). Neighboring resistance groups (12, 14, and 15) are connected together by a second wiring layer (70) formed of the same layer as the first wiring layer (60). The second wiring layer (70) connects one end (61) of the first resistor (20) of the Nth resistance group (14) to the other end (62) of the first resistor (20) of the (N+1)th resistance group (15), and is also formed to extend on top of the other resistors (30 and 40) at a position between these two first resistors (20). In each of the resistance groups (12, 14, and 15), the surface areas of the second wiring layer (70) corresponding to each of the first to third resistors (20, 30, and 40) are set to be substantially equal.

摘要翻译： 电阻梯（10）通过将多个电阻组（12,14和15）连接在一起形成，每个电阻组具有至少在纵向轴向（20,30和40）上延伸的第一至第三电阻器。 在每个电阻组（12,14和15）中，第二和第三电阻器（30和40）平行于第一电阻器（20）的任一侧上的纵向轴向X平行设置。 驱动器电路（16,17和18）连接到相应的电阻组的第三电阻器（40），并且设置在其纵轴方向X的一端。 第一至第三电阻器（20,30和40）通过形成在绝缘层（50）的顶部上的第一布线层（60）连接在一起。 相邻电阻组（12,14和15）由与第一布线层（60）相同的层形成的第二布线层（70）连接在一起。 第二布线层（70）将第N电阻组（14）的第一电阻器（20）的一端（61）与第（N + 1）级的第一电阻器（20）的另一端（62） 电阻组（15），并且还形成为在这两个第一电阻器（20）之间的位置处在其它电阻器（30和40）的顶部延伸。 在每个电阻组（12,14和15）中，与第一至第三电阻器（20,30和40）中的每一个相对应的第二布线层（70）的表面积被设定为基本相等。

公开(公告)号：US07870786B2

公开(公告)日：2011-01-18

申请号：US11979824

申请日：2007-11-08

申请人： Akihiro Fukuzawa

发明人： Akihiro Fukuzawa

IPC分类号： G01P9/04 ,  G01C19/56

CPC分类号： G01C19/5607

摘要： A detection device includes a detection circuit and a reference voltage supply circuit. The detection circuit includes an amplifier circuit, a synchronous detection circuit, and a filter section. The reference voltage supply circuit includes a first supply circuit which includes a reference-voltage first-type operational amplifier and supplies an analog reference voltage to the amplifier circuit, and a second supply circuit which includes a reference-voltage second-type operational amplifier and supplies the analog reference voltage to the filter section. When a channel width and a channel length of a differential-stage transistor of a differential section of the first-type operational amplifier are respectively referred to as W1a and L1a, a bias current flowing through the differential section is referred to as Ia, a channel width and a channel length of a differential-stage transistor of a differential section of the second-type operational amplifier are respectively referred to as W1b and L1b, and a bias current flowing through the differential section is referred to as Ib, W1b×L1b>W1a×L1a and Ia>Ib are satisfied.

摘要翻译： 检测装置包括检测电路和参考电压供给电路。 检测电路包括放大器电路，同步检测电路和滤波器部分。 参考电压供应电路包括第一电源电路，其包括基准电压第一类型运算放大器，并向放大器电路提供模拟基准电压;以及第二电源电路，其包括基准电压第二类运算放大器和电源 模拟参考电压到滤波器部分。 当第一类型运算放大器的差分部分的差分级晶体管的沟道宽度和沟道长度分别被称为W1a和L1a时，流过差分部分的偏置电流被称为Ia，沟道 第二类运算放大器的差分级的差分级晶体管的宽度和沟道长度分别被称为W1b和L1b，并且流过差分部分的偏置电流被称为Ib，W1b×L1b> W1a×L1a和Ia> Ib。

公开(公告)号：US07782042B2

公开(公告)日：2010-08-24

申请号：US11979764

申请日：2007-11-08

申请人： Akihiro Fukuzawa

发明人： Akihiro Fukuzawa

IPC分类号： G05F3/16

CPC分类号： H04B1/1607

摘要： A reference voltage supply circuit includes a first supply circuit that includes a reference-voltage first-type operational amplifier and supplies an analog reference voltage to a first analog reference voltage line, and a second supply circuit that includes a reference-voltage second-type operational amplifier and supplies the analog reference voltage to a second analog reference voltage line. When a channel width and a channel length of a differential-stage transistor of a differential section of the reference-voltage first-type operational amplifier are respectively referred to as W1a and L1a, a bias current flowing through the differential section is referred to as Ia, a channel width and a channel length of a differential-stage transistor of a differential section of the reference-voltage second-type operational amplifier are respectively referred to as W1b and L1b, and a bias current flowing through the differential section is referred to as Ib, W1b×L1b>W1a×L1a and Ia>Ib are satisfied.

摘要翻译： 参考电压供应电路包括第一电源电路，其包括参考电压第一类型运算放大器，并将模拟参考电压提供给第一模拟参考电压线;以及第二电源电路，其包括参考电压第二类型运算 放大器，并将模拟参考电压提供给第二个模拟参考电压线。 当参考电压第一型运算放大器的差分部分的差分级晶体管的沟道宽度和沟道长度分别被称为W1a和L1a时，流过差分部分的偏置电流被称为Ia 基准电压第二类型运算放大器的差分部分的差分级晶体管的沟道宽度和沟道长度分别被称为W1b和L1b，并且流过差分部分的偏置电流被称为 Ib，W1b×L1b> W1a×L1a和Ia> Ib。