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公开(公告)号：US10389251B2
公开(公告)日：2019-08-20
申请号：US16130136
申请日：2018-09-13
Applicant: Advanced Micro Devices, Inc.
Inventor： Wei Huang , Yasuko Eckert , Xudong An , Muhammad Shoaib Bin Altaf , Jieming Yin
Abstract: The described embodiments include an apparatus that controls voltages for an integrated circuit chip having a set of circuits. The apparatus includes a switching voltage regulator separate from the integrated circuit chip and two or more low dropout (LDO) regulators fabricated on the integrated circuit chip. The switching voltage regulator provides an output voltage that is received as an input voltage by each of the two or more LDO regulators, and each of the two or more LDO regulators provides a local output voltage, each local output voltage received as a local input voltage by a different subset of the circuits in the set of circuits. During operation, a controller sets an operating point for each of the subsets of circuits based on a combined power efficiency for the subsets of the circuits and the LDO regulators, each operating point including a corresponding frequency and voltage.
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Patent Agency Ranking
公开(公告)号：US10097091B1
公开(公告)日：2018-10-09
申请号：US15793951
申请日：2017-10-25
Applicant: Advanced Micro Devices, Inc.
Inventor： Wei Huang , Yasuko Eckert , Xudong An , Muhammad Shoaib Bin Altaf , Jieming Yin
Abstract: The described embodiments include an apparatus that controls voltages for an integrated circuit chip having a set of circuits. The apparatus includes a switching voltage regulator separate from the integrated circuit chip and two or more low dropout (LDO) regulators fabricated on the integrated circuit chip. The switching voltage regulator provides an output voltage that is received as an input voltage by each of the two or more LDO regulators, and each of the two or more LDO regulators provides a local output voltage, each local output voltage received as a local input voltage by a different subset of the circuits in the set of circuits. During operation, a controller sets an operating point for each of the subsets of circuits based on a combined power efficiency for the subsets of the circuits and the LDO regulators, each operating point including a corresponding frequency and voltage.
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3.发明授权公开(公告)号：US11194634B2
公开(公告)日：2021-12-07
申请号：US16220827
申请日：2018-12-14
Applicant: Advanced Micro Devices, Inc.
Inventor： Karthik Rao , Shomit N. Das , Xudong An , Wei Huang
IPC: G06F9/46 , G06F9/50 , G06F9/48 , G06F9/38 , H04L29/08 , G06F1/3206 , G06F13/40 , G06F3/06 , H04N19/436
Abstract: In some examples, thermal aware optimization logic determines a characteristic (e.g., a workload or type) of a wavefront (e.g., multiple threads). For example, the characteristic indicates whether the wavefront is compute intensive, memory intensive, mixed, and/or another type of wavefront. The thermal aware optimization logic determines temperature information for one or more compute units (CUs) in one or more processing cores. The temperature information includes predictive thermal information indicating expected temperatures corresponding to the one or more CUs and historical thermal information indicating current or past thermal temperatures of at least a portion of a graphics processing unit (GPU). The logic selects the one or more compute units to process the plurality of threads based on the determined characteristic and the temperature information. The logic provides instructions to the selected subset of the plurality of CUs to execute the wavefront.
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公开(公告)号：US11137809B2
公开(公告)日：2021-10-05
申请号：US16228036
申请日：2018-12-20
Applicant: Advanced Micro Devices, Inc.
Inventor： Karthik Rao , Wei Huang , Xudong An , Manish Arora , Joseph L. Greathouse
Abstract: A plurality of thermal electric cooler (TEC) elements are formed in a TEC grid structure. Control logic dynamically varies a supply current supplied to each TEC element (or group of TEC elements) in the TEC grid based on changes in power density respectively associated with areas cooled by each of the TEC elements or group of TEC elements.
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5.发明授权公开(公告)号：US11726837B2
公开(公告)日：2023-08-15
申请号：US17519290
申请日：2021-11-04
Applicant: Advanced Micro Devices, Inc.
Inventor： Karthik Rao , Shomit N. Das , Xudong An , Wei Huang
IPC: G06F9/50 , G06F9/48 , G06F9/38 , H04L67/12 , G06F1/3206 , G06F13/40 , G06F3/06 , H04N19/436
CPC classification number: G06F9/5094 , G06F9/3867 , G06F9/3877 , G06F9/4893 , G06F9/5011 , G06F9/5027 , G06F9/5055 , H04L67/12 , G06F1/3206 , G06F3/0613 , G06F9/5061 , G06F13/409 , H04N19/436
Abstract: In some examples, thermal aware optimization logic determines a characteristic (e.g., a workload or type) of a wavefront (e.g., multiple threads). For example, the characteristic indicates whether the wavefront is compute intensive, memory intensive, mixed, and/or another type of wavefront. The thermal aware optimization logic determines temperature information for one or more compute units (CUs) in one or more processing cores. The temperature information includes predictive thermal information indicating expected temperatures corresponding to the one or more CUs and historical thermal information indicating current or past thermal temperatures of at least a portion of a graphics processing unit (GPU). The logic selects the one or more compute units to process the plurality of threads based on the determined characteristic and the temperature information. The logic provides instructions to the selected subset of the plurality of CUs to execute the wavefront.
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公开(公告)号：US20190123648A1
公开(公告)日：2019-04-25
申请号：US16130136
申请日：2018-09-13
Applicant: Advanced Micro Devices, Inc.
Inventor： Wei Huang , Yasuko Eckert , Xudong An , Muhammad Shoaib Bin Altaf , Jieming Yin
CPC classification number: H02M3/1582 , G05F1/468 , G05F1/56 , G05F1/575 , H02M2001/0022
Abstract: The described embodiments include an apparatus that controls voltages for an integrated circuit chip having a set of circuits. The apparatus includes a switching voltage regulator separate from the integrated circuit chip and two or more low dropout (LDO) regulators fabricated on the integrated circuit chip. The switching voltage regulator provides an output voltage that is received as an input voltage by each of the two or more LDO regulators, and each of the two or more LDO regulators provides a local output voltage, each local output voltage received as a local input voltage by a different subset of the circuits in the set of circuits. During operation, a controller sets an operating point for each of the subsets of circuits based on a combined power efficiency for the subsets of the circuits and the LDO regulators, each operating point including a corresponding frequency and voltage.
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