公开(公告)号：US20250013158A1

公开(公告)日：2025-01-09

申请号：US18712671

申请日：2022-11-22

Applicant: ASML NETHERLANDS B.V.

Inventor： Huaichen ZHANG ,  Ruben Cornelis MAAS ,  Syam Parayil VENUGOPALAN ,  Jan Wouter BIJLSMA

IPC: G03F7/00

Abstract: A method and system for designing a mark for use in imaging of a pattern on a substrate using a lithographic process in a lithographic apparatus. The method includes obtaining a mark construction, obtaining a spatial variation of a geometric parameter associated with the mark construction, and determining a geometry design of individual patterns of a mark based on the spatial variation and a spatial location of the mark.

公开(公告)号：US20220260921A1

公开(公告)日：2022-08-18

申请号：US17616368

申请日：2020-05-25

Applicant: ASML NETHERLANDS B.V.

Inventor： Jen-Shiang WANG ,  Feng CHEN ,  Matteo Alessandro FRANCAVILLA ,  Jan Wouter BIJLSMA

IPC: G03F7/20 ,  G06F30/392

Abstract: A patterning process modeling method includes determining, with a front end of a process model, a function associated with process physics and/or chemistry of an operation within a patterning process flow; and determining, with a back end of the process model, a predicted wafer geometry. The back end includes a volumetric representation of a target area on the wafer. The predicted wafer geometry is determined by applying the function from the front end to manipulate the volumetric representation of the wafer. The volumetric representation of the wafer may be generated using volumetric dynamic B-trees. The volumetric representation of the wafer may be manipulated using a level set method. The function associated with the process physics and/or chemistry of the operation within the patterning process flow may be a velocity/speed function. Incoming flux on a modeled surface of the wafer may be determined using ray tracing.

公开(公告)号：US20160140267A1

公开(公告)日：2016-05-19

申请号：US14941347

申请日：2015-11-13

Applicant: ASML NETHERLANDS B.V.

Inventor： Guangqing CHEN ,  Shufeng BAI ,  Eric Richard KENT ,  Yen-Wen LU ,  Paul Anthony TUFFY ,  Jen-Shiang WANG ,  Youping ZHANG ,  Gertjan ZWARTJES ,  Jan Wouter BIJLSMA

IPC: G06F17/50 ,  G03F7/20

CPC classification number: G06F17/5009 ,  G03F7/705 ,  G03F7/70633 ,  G03F7/70683 ,  G06F17/12 ,  G06F17/14

Abstract: Methods and systems for automatically generating robust metrology targets which can accommodate a variety of lithography processes and process perturbations. Individual steps of an overall lithography process are modeled into a single process sequence to simulate the physical substrate processing. That process sequence drives the creation of a three-dimensional device geometry as a whole, rather than “building” the device geometry element-by-element.

Abstract translation: 用于自动生成稳健计量目标的方法和系统，可以适应各种光刻过程和过程扰动。 整个光刻过程的各个步骤被建模成单个过程序列以模拟物理衬底处理。 该过程顺序驱动了整体的三维设备几何的创建，而不是逐个“构建”设备几何。