公开(公告)号：US20100181598A1

公开(公告)日：2010-07-22

申请号：US12648974

申请日：2009-12-29

Applicant: Tsutomu SATO ,  Jun Idebuchi ,  Yoshihisa Arie

Inventor： Tsutomu SATO ,  Jun Idebuchi ,  Yoshihisa Arie

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/7848 ,  H01L21/3086 ,  H01L21/76232 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/78

Abstract: Etch block layers having an etching rate smaller than that of a first semiconductor forming a semiconductor substrate are formed on the sidewalls of device isolation grooves by applying oblique ion implantation of Ox, N, or C to the semiconductor substrate including the first semiconductor. Embedded layers including a second semiconductor are selectively formed in recesses by epitaxial-growing the second semiconductor having a lattice constant larger than that of the first semiconductor in the recesses.

Abstract translation: 通过对包括第一半导体的半导体衬底进行斜离子注入，在器件隔离槽的侧壁上形成蚀刻速度小于形​​成半导体衬底的第一半导体的蚀刻速率的蚀刻阻挡层。 包括第二半导体的嵌入层通过在凹槽中外延生长具有大于第一半导体的晶格常数的晶格常数的第二半导体而选择性地形成在凹陷中。