公开(公告)号：US20090267145A1

公开(公告)日：2009-10-29

申请号：US12108045

申请日：2008-04-23

Applicant: Charles Walter Pearce ,  Simon J. Molloy ,  Shuming Xu ,  Xiao Rui Li

Inventor： Charles Walter Pearce ,  Simon J. Molloy ,  Shuming Xu ,  Xiao Rui Li

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/0847 ,  H01L29/402 ,  H01L29/66659 ,  H01L29/7835

Abstract: A method of forming a metal-oxide-semiconductor (MOS) device includes the following steps: forming a semiconductor layer of a first conductivity type having source and drain regions of a second conductivity type, a channel region and a lightly-doped drain region formed therein; forming a gate over the channel region proximate an upper surface of the semiconductor layer; after the forming steps, depositing a first dielectric layer having a first thickness over an upper surface of the semiconductor layer; etching the first dielectric layer in a region over the lightly-doped drain proximate to the gate to reduce its thickness; conformably depositing a second dielectric layer having a second thickness over the first dielectric layer, including in the etched region, the second thickness being less than the first thickness; and forming a shielding electrode over the second dielectric layer.

Abstract translation: 形成金属氧化物半导体（MOS）器件的方法包括以下步骤：形成第一导电类型的半导体层，其具有第二导电类型的源极和漏极区域，沟道区域和形成的轻掺杂漏极区域 其中 在靠近半导体层的上表面的沟道区上形成栅极; 在形成步骤之后，在半导体层的上表面上沉积具有第一厚度的第一介电层; 在靠近栅极的轻掺杂漏极上的区域中蚀刻第一介电层以减小其厚度; 在所述第一介电层上沉积具有第二厚度的第二介电层，所述第二介电层包括在所述蚀刻区域中，所述第二厚度小于所述第一厚度; 以及在所述第二电介质层上形成屏蔽电极。