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公开(公告)号：US20130187956A1
公开(公告)日：2013-07-25
申请号：US13356551
申请日：2012-01-23
申请人： Walter R. STEINER , Eric LUM , Dale L. KIRKLAND , Steven James HEINRICH , David Charles PATRICK
发明人： Walter R. STEINER , Eric LUM , Dale L. KIRKLAND , Steven James HEINRICH , David Charles PATRICK
IPC分类号： G09G5/00
摘要： In a graphics processing pipeline, a processing unit establishes a bounding box around a polygon in order to identify sample points that are covered by the polygon. For a given sample point included within the bounding box, the processing unit constructs a set of lines that intersect at the sample point, where each line in the set of lines is parallel to at least one side of the polygon. When all vertices of the polygon reside on one side of at least one line in the set of lines, the processing unit may reduce the size of the bounding box to exclude the sample point.
摘要翻译： 在图形处理流水线中，处理单元在多边形周围建立边界框，以便识别多边形覆盖的采样点。 对于包含在边界框内的给定采样点，处理单元构建在采样点相交的一组线，其中该组线中的每条线平行于多边形的至少一侧。 当多边形的所有顶点驻留在该组行中的至少一行的一侧时，处理单元可以减小边界框的大小以排除采样点。
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公开(公告)号：US5126726A
公开(公告)日：1992-06-30
申请号：US457876
申请日：1989-12-27
申请人： Edwin O. Howard , Walter R. Steiner , Michael L. Morgan , Gregory C. Buchner , Richard Economy , Edward M. Sims
发明人： Edwin O. Howard , Walter R. Steiner , Michael L. Morgan , Gregory C. Buchner , Richard Economy , Edward M. Sims
IPC分类号： H04N5/21 , G06T1/00 , G09G5/00 , G09G5/02 , G09G5/36 , G09G5/42 , H04N1/387 , H04N5/66 , H04N7/015 , H04N9/74
CPC分类号： G09G5/02
摘要： The values of an attribute, like color, to be assigned to the right and left half of a pixel of a display device, such as may be determined by a computer image generation system, are compared for determining a difference value. If the difference value is less than a predetermined threshold, an average of the left and right half values is assigned to the pixel. If the difference value is greater than or equal to the threshold, then the right and left half values are assigned to the respective right and left halves of the pixel and during the raster scan, the attribute value of the pixel to be displayed is transitioned at the beginning of the pixel interval and in the middle of the pixel interval so that the pixel presents an image in response to the corresponding right and left half values. The data for the left and right half values may be truncated and stored as a portion of the data word or may be encoded into logarithmetic form having a mantissa and shift code. In either case, the data word may be the same length as words previously used to define the color of a pixel, thereby avoiding having to alter memory allocation of existing systems.
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公开(公告)号：US4862392A
公开(公告)日：1989-08-29
申请号：US838300
申请日：1986-03-07
申请人： Walter R. Steiner
发明人： Walter R. Steiner
摘要： A geometry process for use in a graphics processing system, especially adapted to couple with a hierarchically structured graphics database memory, a special purpose processor for traversing the database, and a display processor, wherein the geometry processor includes double-buffered input registers, a first private data bus to the special purpose traversing processor, a second private data bus to the graphics database memory, a high-speed arithmetic processing module, a double-buffered output register, and a microprogrammable control system. The geometry processor is configured to process the graphics database in two passes. The first pass is a culling operation that culls out graphics data supplied from the database memory that is outside of a defined viewing volume, with the culled data being sent over of the first private bus to a stack memory in the traversing processor. The second pass retraverses the culled data, along with additional associated data from the database memory, from the traversing processor's stack memory and transforms that data from a three-dimensional mathematical format to a two-dimensional format suitable for display on a video display system.
摘要翻译： 一种在图形处理系统中使用的几何过程，特别适于与分层结构的图形数据库存储器耦合，用于遍历数据库的专用处理器和显示处理器，其中所述几何处理器包括双缓冲输入寄存器，第一 专用数据总线到专用遍历处理器，第二专用数据总线到图形数据库存储器，高速算术处理模块，双缓冲输出寄存器和微程序控制系统。 几何处理器被配置为在两次通过中处理图形数据库。 第一遍是剔除从数据库存储器提供的图形数据的剔除操作，该图形数据位于定义的观看卷之外，剔除的数据通过第一专用总线发送到遍历处理器中的堆栈存储器。 第二遍从遍历处理器的堆栈存储器重新追溯剔除的数据以及来自数据库存储器的额外的相关数据，并将该数据从三维数学格式转换成适合于在视频显示系统上显示的二维格式。
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公开(公告)号：US09633458B2
公开(公告)日：2017-04-25
申请号：US13356551
申请日：2012-01-23
申请人： Walter R. Steiner , Eric Lum , Dale L. Kirkland , Steven James Heinrich , David Charles Patrick
发明人： Walter R. Steiner , Eric Lum , Dale L. Kirkland , Steven James Heinrich , David Charles Patrick
摘要： In a graphics processing pipeline, a processing unit establishes a bounding box around a polygon in order to identify sample points that are covered by the polygon. For a given sample point included within the bounding box, the processing unit constructs a set of lines that intersect at the sample point, where each line in the set of lines is parallel to at least one side of the polygon. When all vertices of the polygon reside on one side of at least one line in the set of lines, the processing unit may reduce the size of the bounding box to exclude the sample point.
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5.发明授权Method for parallel fine rasterization in a raster stage of a graphics pipeline 有权在图形管道的光栅阶段中并行精细光栅化的方法公开(公告)号：US08928676B2
公开(公告)日：2015-01-06
申请号：US11474027
申请日：2006-06-23
申请人： Walter R. Steiner , Franklin C. Crow , Craig M. Wittenbrink , Roger L. Allen , Douglas A. Voorhies
发明人： Walter R. Steiner , Franklin C. Crow , Craig M. Wittenbrink , Roger L. Allen , Douglas A. Voorhies
CPC分类号： G06T11/40 , G06T15/005
摘要： In a raster stage of a graphics processor, a method for parallel fine rasterization. The method includes receiving a graphics primitive for rasterization in a raster stage of a graphics processor. The graphics primitive is rasterized at a first level to generate a plurality of tiles of pixels. The titles are subsequently rasterized at a second level by allocating the tiles to an array of parallel second-level rasterization units to generate covered pixels. The covered pixels are then output for rendering operations in a subsequent stage of the graphics processor.
摘要翻译： 在图形处理器的光栅阶段，一种并行精细光栅化的方法。 该方法包括在图形处理器的光栅级中接收用于光栅化的图形基元。 图形原语在第一级被光栅化以生成多个像素块。 随后通过将瓦片分配到并行的第二级光栅化单元的阵列来生成被覆盖的像素，随后将标题在第二级光栅化。 然后，在图形处理器的后续阶段输出被覆盖像素进行渲染操作。
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公开(公告)号：US4965745A
公开(公告)日：1990-10-23
申请号：US135059
申请日：1987-12-18
CPC分类号： G06T15/50
摘要： The human eye is more sensitive to brightness than to color. Accordingly, color definition is defined by a luminance or brightness (Y) component, an in-phase component (I) and a quadrature component (Q) and which are appropriately processed before being converted to more traditional red, green and blue (RGB) components for color display control. Scaling and redesignating YIQ data permits representation by fewer bits than a RGB scheme during processing. Also, Y values may be processed at one level of detail while the corresponding I and Q data values may be processed at a lesser level of detail. Translucency information may also be accommodated.
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公开(公告)号：US4700319A
公开(公告)日：1987-10-13
申请号：US741644
申请日：1985-06-06
申请人： Walter R. Steiner
发明人： Walter R. Steiner
CPC分类号： H03M7/24 , G06F7/483 , G06F7/485 , G06F7/4876 , G06F1/0307 , G06F2207/3884 , G06F7/49905 , G06F7/49921 , G06F7/5235
摘要： The arithmetic pipeline processor (which is used for computer graphics such as a flight simulator) is a group of boards capable of solving an equation of the formA.sup.m B.sup.n +C.sup.o D.sup.P +E.sup.q F.sup.r +G.sup.s H.sup.twhere A, B, C, D, E, F, G, H are 32-bit implied one floating point numbers, and m, n, o, p, q, r, s, t can take on the values 1/4, 1/2, 1, 2 and 0. It includes a digital logarithmic calculator using shifters and stored tables to perform arithmetic functions such as multiplication, division, squares, square roots, and fourth roots. It comprises two input ports each capable of receiving digital data N bits wide. Included are a log transform unit, a log sum or difference unit and an antilog unit. Following these is an M-bit Aritmetic Logic Unit (ALU) and circuitry for converting between fixed point and floating point numbers. It uses piece wise linear approximation in conjunction with stored slope information in tables to do the transform calculation of logarithms and antilogarithms. The M-bit arithmetic unit performs accumulation of up to K terms. In a specific emodiment, N=32, M=36, and K=128. Note that a pipeline processor has no central processing unit or software in itself, but it may interface with a computer for inputs and outputs including control information.
摘要翻译： 算术流水线处理器（用于诸如飞行模拟器的计算机图形学）是能够求解AmBn + CoDP + EqFr + GsHt形式的等式的一组板，其中A，B，C，D，E，F， G，H是32位隐含的一个浮点数，m，n，o，p，q，r，s，t可以取值1/4，1/2，1,2和0.它包括 使用移位器和存储表来执行诸如乘法，除法，正方形，平方根和第四根的算术功能的数字对数计算器。 它包括两个输入端口，每个输入端口能够接收N位宽的数字数据。 包括日志变换单元，对数或差分单元和反序列单元。 以下是一个M位控制逻辑单元（ALU）和用于在固定点和浮点数之间转换的电路。 它使用片状线性近似与表中存储的斜率信息一起进行对数和反对数的变换计算。 M位运算单元执行高达K项的累加。 在具体实例中，N = 32，M = 36和K = 128。 注意，流水线处理器本身没有中央处理单元或软件，但是它可以与计算机连接，用于包括控制信息的输入和输出。
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公开(公告)号：US06377274B1
公开(公告)日：2002-04-23
申请号：US09354189
申请日：1999-07-15
申请人： Walter R. Steiner
发明人： Walter R. Steiner
IPC分类号： G06T1140
CPC分类号： G06T9/001 , G06T15/503
摘要： A method and apparatus, for use in a computer image generation system wherein polygons are displayed on an array of pixels, for encoding data representing intersections of the polygons and the pixels. The method comprises the steps of receiving input data signals characterizing a set of coordinates of each of at least three vertices of each polygon to be displayed, each different pair of the vertices of each polygon defining a different edge of the polygon; and generating, responsive to the received vertex data signals, edge data signals describing the intersection, if any, of the polygon edges with each pixel to be displayed.
摘要翻译： 一种在计算机图像生成系统中使用的方法和装置，其中多边形显示在像素阵列上，用于对表示多边形和像素的交点的数据进行编码。 该方法包括以下步骤：接收表征要显示的每个多边形的至少三个顶点中的每个至少三个顶点的坐标集合的输入数据信号，每个多边形的每个不同的顶点对定义多边形的不同边缘; 并且响应于所接收的顶点数据信号，生成描述要显示的每个像素的多边形边缘的边界数据信号（如果有的话）。
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9.发明授权Computer image generation method for determination of total pixel illumination due to plural light sources 失效用于确定由多个光源引起的总像素照度的计算机图像生成方法
公开(公告)号：US5268996A
公开(公告)日：1993-12-07
申请号：US631254
申请日：1990-12-20
申请人： Walter R. Steiner , William A. Kelly , Robert J. Caesar, Jr. , Gregory C. Buchner , Michael L. Morgan
发明人： Walter R. Steiner , William A. Kelly , Robert J. Caesar, Jr. , Gregory C. Buchner , Michael L. Morgan
CPC分类号： G06T15/50
摘要： A method for determining the illumination of an illuminator at a selected point P in an image volume to be projected on an image screen surface by a computerized image generator, operates by: decomposing the illuminator into at least one of spherical, beam and cylindrical sources; determining a direction of incidence of the light from each source at point P in the image volume; determining the extent of the source and the attenuation of illumination with distance from that source; then determining a set of color light intensities at point P in the image volume due to the light from the particular source; and translating the incidence direction and color intensities from point P to a displayable incidence direction and a displayable set of color illumination intensities at a corresponding projection location on the image screen surface.
摘要翻译： 一种用于通过计算机化图像发生器确定要在投影到图像屏幕表面上的图像体积中的选定点P处的照明器的照明的方法，通过：将照明器分解成球形，光束和圆柱形源中的至少一种; 确定来自图像体积中的点P处的每个源的光的入射方向; 确定源的范围和距离该源的距离的衰减; 然后由于来自特定源的光而确定图像体积中的点P处的一组颜色光强度; 以及将图像屏幕表面上的相应投影位置处的入射方向和颜色强度从点P转换为可显示的入射方向和可显示的彩色照明强度的集合。
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公开(公告)号：US4967375A
公开(公告)日：1990-10-30
申请号：US840459
申请日：1986-03-17
CPC分类号： G06T17/00
摘要： A graphics processor having an independent processor for traversing a hierarchical graphics data base. The independent processor, termed a "tree traverser", generates a stream of addresses to the memory in which the data base is stored, producing a stream of data over a private, unidirectional data path to a geometry processor.
摘要翻译： 具有用于遍历分层图形数据库的独立处理器的图形处理器。 被称为“树形遍历器”的独立处理器生成地址流到其中存储数据库的存储器，通过专用的单向数据路径产生数据流到几何处理器。
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