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公开(公告)号：US08829979B2
公开(公告)日：2014-09-09
申请号：US12807610
申请日：2010-09-08
申请人： Sherif Galal , Tay Hui Zheng , Todd L. Brooks
发明人： Sherif Galal , Tay Hui Zheng , Todd L. Brooks
CPC分类号： H02M3/07
摘要： Disclosed is a power-efficient multi-mode charge pump. The charge pump comprises a first pumping circuit that provides at least one output voltage produced by a discharge sequence of a shared flyback capacitor. The charge pump also comprises a second pumping circuit that provides a plurality of output voltages produced by a corresponding plurality of discharge sequences of the shared flyback capacitor. The charge pump may include a transition circuit to selectably enable the first pumping circuit or the second pumping circuit. In one embodiment, the first pumping circuit may employ a two-phase discharge sequence. In another embodiment, the second pumping circuit may employ a three-phase plurality of discharge sequences. A related method is also disclosed.
摘要翻译： 公开了一种功率高效的多模式电荷泵。 电荷泵包括提供由共享回扫电容器的放电序列产生的至少一个输出电压的第一泵浦电路。 电荷泵还包括第二泵浦电路，其提供由共享回扫电容器的相应多个放电序列产生的多个输出电压。 电荷泵可以包括可选择地使第一泵送电路或第二泵浦电路的转换电路。 在一个实施例中，第一泵浦电路可采用两相放电序列。 在另一个实施例中，第二泵浦电路可以采用三相多个放电序列。 还公开了相关方法。
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2.发明授权Class-AB/B amplifier and quiescent control circuit for implementation with same 失效AB类放大器和静态控制电路用于实现公开(公告)号：US08294518B2
公开(公告)日：2012-10-23
申请号：US12807403
申请日：2010-09-03
IPC分类号： H03F3/26
CPC分类号： H03F3/211 , H03F1/301 , H03F3/3022 , H03F2200/375 , H03F2200/453 , H03F2203/30015
摘要： Disclosed is a Class-AB/B amplifier comprising a first output stage including a first plurality of amplification devices and a second output stage including a second plurality of amplification devices. According to one embodiment, the first output stage operates when the Class-AB/B amplifier is in a quiescent state and the second output stage operates when the Class-AB/B amplifier is in an active state. The Class-AB/B amplifier also comprises a level shifting circuit that adjusts a control voltage of the second output stage, where the level shifting circuit is adapted to activate the second output stage when the Class-AB/B amplifier enters the active state. Embodiments of the Class-AB/B amplifier may include a level shifting circuit that implements either a fixed or signal-dependent level shift, and a quiescent control circuit that substantially eliminates any systematic offset arising from the active feedback circuit inside the replica bias circuit.
摘要翻译： 公开了一种AB-B类放大器，其包括包括第一多个放大装置的第一输出级和包括第二多个放大装置的第二输出级。 根据一个实施例，当AB类/ B放大器处于静态时，第一输出级工作，而当AB类/ B放大器处于活动状态时，第二输出级工作。 AB类/ B放大器还包括一个电平移动电路，其调节第二输出级的控制电压，其中当AB类/ B放大器进入激活状态时，电平移位电路用于激活第二输出级。 AB类/ B放大器的实施例可以包括实现固定或信号相关电平移位的电平移位电路和基本上消除由复制偏置电路内部的有源反馈电路产生的任何系统偏移的静态控制电路。
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3.发明授权公开(公告)号：US08237496B2
公开(公告)日：2012-08-07
申请号：US12804834
申请日：2010-07-29
申请人： Xicheng Jiang , Jungwoo Song , Minsheng Wang , Todd L. Brooks
发明人： Xicheng Jiang , Jungwoo Song , Minsheng Wang , Todd L. Brooks
IPC分类号： H03F3/38
CPC分类号： H03F3/217
摘要： Disclosed is a switching amplifier having an enhanced supply rejection. The switching amplifier comprises a digital modulator that provides a modulated signal. The switching amplifier further comprises a closed-loop analog driver that is coupled to the digital modulator. As disclosed, the closed-loop analog driver is configured to re-modulate a modulation signal that corresponds to the modulated signal. An output stage of the switching amplifier is driven by the re-modulated signal, thereby providing enhanced supply rejection. In one embodiment, the modulated signal is produced by a digital pulse-width modulator (PWM) circuit of a Class-D amplifier, and has a pulse rate substantially less than a clock rate of the digital PWM circuit. In one embodiment, the switching amplifier is implemented as an audio amplifier in a mobile communication device such as a cellular telephone.
摘要翻译： 公开了具有增强的电源抑制的开关放大器。 开关放大器包括提供调制信号的数字调制器。 开关放大器还包括耦合到数字调制器的闭环模拟驱动器。 如所公开的，闭环模拟驱动器被配置为重新调制对应于调制信号的调制信号。 开关放大器的输出级由再调制信号驱动，从而提供增强的电源抑制。 在一个实施例中，调制信号由D类放大器的数字脉冲宽度调制器（PWM）电路产生，并且具有基本上小于数字PWM电路的时钟速率的脉冲速率。 在一个实施例中，开关放大器被实现为诸如蜂窝电话的移动通信设备中的音频放大器。
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公开(公告)号：US20110204961A1
公开(公告)日：2011-08-25
申请号：US12807610
申请日：2010-09-08
申请人： Sherif Galal , Tay Hui Zheng , Todd L. Brooks
发明人： Sherif Galal , Tay Hui Zheng , Todd L. Brooks
IPC分类号： G05F1/10
CPC分类号： H02M3/07
摘要： Disclosed is a power-efficient multi-mode charge pump. The charge pump comprises a first pumping circuit that provides at least one output voltage produced by a discharge sequence of a shared flyback capacitor. The charge pump also comprises a second pumping circuit that provides a plurality of output voltages produced by a corresponding plurality of discharge sequences of the shared flyback capacitor. The charge pump may include a transition circuit to selectably enable the first pumping circuit or the second pumping circuit. In one embodiment, the first pumping circuit may employ a two-phase discharge sequence. In another embodiment, the second pumping circuit may employ a three-phase plurality of discharge sequences. A related method is also disclosed.
摘要翻译： 公开了一种功率高效的多模式电荷泵。 电荷泵包括提供由共享回扫电容器的放电序列产生的至少一个输出电压的第一泵浦电路。 电荷泵还包括第二泵浦电路，其提供由共享回扫电容器的相应多个放电序列产生的多个输出电压。 电荷泵可以包括可选择地使第一泵送电路或第二泵浦电路的转换电路。 在一个实施例中，第一泵浦电路可采用两相放电序列。 在另一个实施例中，第二泵浦电路可以采用三相多个放电序列。 还公开了相关方法。
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5.发明申请Method and System for Detecting and Identifying Electronic Accessories or Peripherals 有权检测和识别电子附件或外围设备的方法和系统公开(公告)号：US20100117685A1
公开(公告)日：2010-05-13
申请号：US12268305
申请日：2008-11-10
IPC分类号： H03K5/22
CPC分类号： G06F13/4072
摘要： Aspects of a method and system for detecting and identifying electronic accessories or peripherals utilizing a hardware audio CODEC are provided. In this regard, a hardware audio CODEC may be operable to compare one or more voltages on one or more biased pins of an accessory or peripheral port to one or more reference voltages and generate one or more digital representations of the one or more voltages on the biased one or more pins. An accessory or peripheral attached to the accessory or peripheral port may be identified based on the comparison and/or the generated one or more digital representations. The one or more bias voltages may be controlled based on a result of the comparison and/or the generated digital representations. The one or more bias voltages may be reduced after an attached accessory or peripheral has been identified.
摘要翻译： 提供了利用硬件音频CODEC来检测和识别电子附件或外围设备的方法和系统的方面。 在这方面，硬件音频编解码器可以用于将附件或外围端口的一个或多个偏置引脚上的一个或多个电压与一个或多个参考电压进行比较，并且生成一个或多个电压的一个或多个数字表示 偏置一个或多个引脚。 可以基于比较和/或所生成的一个或多个数字表示来识别附接到附件或外围端口的附件或外围设备。 可以基于比较的结果和/或所生成的数字表示来控制一个或多个偏置电压。 在附加附件或外围设备被识别之后，可以减小一个或多个偏置电压。
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6.发明授权公开(公告)号：US07593483B2
公开(公告)日：2009-09-22
申请号：US11124394
申请日：2005-05-09
CPC分类号： H03M7/3013
摘要： In a high-fidelity digital modulator, a mapper is provided to minimize quantization noise, jitter, and cross-talk between multiple digital-to-analog or analog-to-digital converters. The mapper receives a quantized level from a quantizer and maps the quantized level to an output sequence. The mapper includes a table defining multiple sequences corresponding to each quantized level. Each sequence includes two or more symbols, having one of multiple values. The mapper also includes a generator that selects one of the multiple sequences as the output sequence. The last symbol of a first output sequence is equal to the first symbol of the next output sequence and so on. The generator selects the output sequence by alternating between a first and a second sequence for each quantized level received. The generator selects the output sequence by alternating between sequences having a positive and a negative common mode energy for each odd valued quantized level received.
摘要翻译： 在高保真数字调制器中，提供映射器以最小化多个数模转换器或模数转换器之间的量化噪声，抖动和串扰。 映射器从量化器接收量化电平，并将量化电平映射到输出序列。 映射器包括定义对应于每个量化级别的多个序列的表。 每个序列包括具有多个值之一的两个或多个符号。 映射器还包括选择多个序列之一作为输出序列的发生器。 第一个输出序列的最后一个符号等于下一个输出序列的第一个符号，依此类推。 发生器通过在接收到的每个量化级别的第一和第二序列之间交替来选择输出序列。 发生器通过在接收到的每个奇数值量化电平具有正和负共模能量的序列之间交替来选择输出序列。
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公开(公告)号：US06934176B2
公开(公告)日：2005-08-23
申请号：US10916606
申请日：2004-08-12
申请人： Khim L. Low , Todd L. Brooks , Agnes Woo , Akira Ito
发明人： Khim L. Low , Todd L. Brooks , Agnes Woo , Akira Ito
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： The present invention is directed to systems for evaluating one-time programmable memory cells. A threshold current is applied to a resistive circuit, thereby generating a threshold voltage. A read current is applied to a first memory cell, thereby generating a memory cell voltage. The memory cell voltage is compared to the threshold voltage, thereby determining the state of the memory cell. In a further embodiment of the invention, a second threshold voltage is generated and compared the memory cell voltage, thereby verifying the state of the memory cell. The threshold current is optionally a substantial replica of said read current. The threshold current is optionally a proportional substantial replica of said read current. In an embodiment, the resistive circuit includes a second memory cell, which can be programmed or unprogrammed. The second memory cell is optionally arranged to average the memory cell resistance.
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公开(公告)号：US5982313A
公开(公告)日：1999-11-09
申请号：US870818
申请日：1997-06-06
申请人： Todd L. Brooks , David Robertson
发明人： Todd L. Brooks , David Robertson
摘要： An ADC system includes a sigma-delta modulator that receives an analog input and provides a first digital output and an analog output. An ADC, coupled to the sigma-delta modulator, receives the analog output as an input and provides a second digital output. A digital processor, coupled to the sigma-delta modulator and the ADC, receives the first and second digital outputs and provides a digital representation of the analog input.
摘要翻译： ADC系统包括接收模拟输入并提供第一数字输出和模拟输出的Σ-Δ调制器。 耦合到Σ-Δ调制器的ADC接收模拟输出作为输入并提供第二数字输出。 耦合到Σ-Δ调制器和ADC的数字处理器接收第一和第二数字输出并提供模拟输入的数字表示。
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公开(公告)号：US5365199A
公开(公告)日：1994-11-15
申请号：US100789
申请日：1993-08-02
申请人： Todd L. Brooks
发明人： Todd L. Brooks
摘要： A class A amplifier (20) includes an amplifier (21), a capacitor (22), and an output stage (23). The output stage (23) includes a source-follower transistor (24) and a feedback circuit (25). The source-follower transistor (24) receives an analog signal from the amplifier (21) and provides a corresponding output signal to a load. The feedback circuit (25) provides current feedback to maintain a relatively constant drain current in the source-follower transistor (24). The class A amplifier (20) with the feedback circuit (25) provides high current drive capability with low quiescent power consumption, high power supply rejection, high voltage gain, and stable operation without the use of a Miller compensation capacitor.
摘要翻译： A类放大器（20）包括放大器（21），电容器（22）和输出级（23）。 输出级（23）包括源极跟随器晶体管（24）和反馈电路（25）。 源极跟随器晶体管（24）从放大器（21）接收模拟信号，并向负载提供相应的输出信号。 反馈电路（25）提供电流反馈以在源极跟随器晶体管（24）中保持相对恒定的漏极电流。 具有反馈电路（25）的A类放大器（20）提供高电流驱动能力，具有低静态功耗，高电源抑制，高电压增益和稳定工作，无需使用米勒补偿电容器。
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公开(公告)号：US08582577B2
公开(公告)日：2013-11-12
申请号：US13092255
申请日：2011-04-22
申请人： James C. Thi , Theodore F. Rabenko , David Hartman , Robert M. Lukas , Kenneth J. Unger , Ramin Borazjani , Shane P. Lansing , Robert J. Lee , Todd L. Brooks , Kevin L. Miller
发明人： James C. Thi , Theodore F. Rabenko , David Hartman , Robert M. Lukas , Kenneth J. Unger , Ramin Borazjani , Shane P. Lansing , Robert J. Lee , Todd L. Brooks , Kevin L. Miller
CPC分类号： H04M7/0087 , H04B3/23 , H04B3/234 , H04J3/0632 , H04J3/0638 , H04L12/2801 , H04L12/2834 , H04L12/5692 , H04L12/66 , H04L29/06027 , H04L65/1069 , H04M7/006 , H04M7/125 , H04N7/10 , H04N21/2383 , H04N21/4382
摘要： A system is configured to facilitate bidirectional voice communication between a number of data and/or telephony devices.
摘要翻译： 系统被配置为促进多个数据和/或电话设备之间的双向语音通信。
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