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公开(公告)号：US12154281B2
公开(公告)日：2024-11-26
申请号：US17683746
申请日：2022-03-01
Applicant: Sigmastar Technology Ltd.
Inventor： Ning-Ching Hsieh
Abstract: A device for detecting the movement of object in images includes a weight determination circuit, an image blending circuit, and an object movement detection circuit. The weight determination circuit determines multiple weights according to an input image and a background image, each weight corresponding to a pixel position. The image blending circuit blends the input image and the background image based on the weights to generate an updated background image. The object movement detection circuit performs a sum of absolute difference (SAD) calculation, block by block, with the input image and the background image or the updated background image to generate a moving object indication data. The object movement detection circuit generates an object movement signal according to the moving object indication data and at least one threshold. Each block contains multiple pixels.
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公开(公告)号：US20240361365A1
公开(公告)日：2024-10-31
申请号：US18621617
申请日：2024-03-29
Applicant: SigmaStar Technology Ltd.
Inventor： Xiang ZHANG , Kai SUN , Ze-Wei HE , Jian-Feng XUE , Wei-Ping WANG
CPC classification number: G01R21/00 , G01R19/0038
Abstract: A power detector device includes a voltage generator circuit, a reference circuit, a level hold circuit and a comparator circuit. The voltage generator circuit generates a bias voltage and a detection voltage according to a power supply voltage. The reference circuit generates a first reference voltage according to the power supply voltage. The level hold circuit selectively transmits the first reference voltage to a node according to the bias voltage, outputs a second reference voltage via the node, and holds a level of the second reference voltage after stopping transmitting the first reference voltage to the node. The comparator circuit compares the second reference voltage with the detection voltage to generate a power detection signal.
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公开(公告)号：US20240320365A1
公开(公告)日：2024-09-26
申请号：US18395990
申请日：2023-12-26
Applicant: SigmaStar Technology Ltd.
Inventor： Qin-Wei She , Yan-Xiong Wu , Xiao-Min Zhang
CPC classification number: G06F21/6245 , H04L63/0435
Abstract: A data protection device includes a memory, a read-only memory and a verification circuit. The read-only memory stores first confidential data, and transmits the first confidential data to the memory after being powered up, wherein the first confidential data includes multiple groups of repetitive data and the groups of repetitive data are the same with one another. The verification data determines whether the first confidential data is valid before a processor reads the first confidential data from the memory, and allows the processor to read the first confidential data from the memory when the first confidential data is valid.
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公开(公告)号：US20240265947A1
公开(公告)日：2024-08-08
申请号：US18467827
申请日：2023-09-15
Applicant: SigmaStar Technology Ltd.
IPC: G11B20/10 , G11B20/00 , G11B27/031 , H04N19/172
CPC classification number: G11B20/10527 , G11B20/00007 , G11B27/031 , H04N19/172 , G11B2020/00072
Abstract: A still frame image decoding method includes: decoding a first frame in first data of multiple data according to a reference frame at a reference location of a memory, and storing the first frame to the reference location to overwrite at least one part of the reference frame; selecting the first data from the multiple data and decoding a second frame in the first data according to the first frame at the reference location in response to a still frame command; adjusting the second frame, and storing the adjusted second frame to an output location of the memory; preserving the first frame at the reference location; and again decoding the second frame according to the first frame at the reference location according to an end command, so as to store the second frame to the reference location to overwrite at least one part of the first frame.
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公开(公告)号：US20240259237A1
公开(公告)日：2024-08-01
申请号：US18392172
申请日：2023-12-21
Applicant: SigmaStar Technology Ltd.
Inventor： Ze-Wei HE , Kai SUN , Yin-Yin GU
IPC: H04L25/02
CPC classification number: H04L25/0272 , H04L25/028
Abstract: The transmitter includes a serializer, a main driver and an auxiliary driver. The serializer sequentially outputs, according to a clock signal, a first signal and a second signal as two consecutive data of a first output signal, and detects whether the first signal and the second signal are the same so as to generate a control signal. The main driver generates a second output signal according to the first output signal. The auxiliary driver is selectively switched according to the control signal, wherein the main driver and the auxiliary driver are powered by the same supply voltage.
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Patent Agency Ranking
6.发明公开公开(公告)号：US20240231899A9
公开(公告)日：2024-07-11
申请号：US18321042
申请日：2023-05-22
Applicant: SigmaStar Technology Ltd.
Inventor： Bo YANG
IPC: G06F9/48 , G06F9/30 , G06F9/4401
CPC classification number: G06F9/4881 , G06F9/3004 , G06F9/4418
Abstract: A task processing system includes an intelligence processing unit and an instruction processor. The instruction processor receives a task originated from a main processor and enables the intelligence processing unit in response to the task. The intelligence processing unit selects a corresponding firmware file from a plurality of firmware files according to the task and re-enables the instruction processor, such that the instruction processor operates the corresponding firmware file and cooperates with the instruction processor to complete the task.
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7.发明公开公开(公告)号：US20240231828A9
公开(公告)日：2024-07-11
申请号：US18376454
申请日：2023-10-04
Applicant: SigmaStar Technology Ltd.
Inventor： Ya Ming Deng
IPC: G06F9/30
CPC classification number: G06F9/30178 , G06F9/30112
Abstract: A process compression method for compressing a process that includes a jump instruction includes the following steps: dividing the process into multiple blocks according to a position of the jump instruction in the process and a destination of the jump instruction; storing a jump relationship between these blocks; performing instruction compression on these blocks; updating a jump address of the jump instruction according to the jump relationship; determining multiple groups according to the sizes of the blocks and the jump relationship; and determining whether the jump instruction is a jump instruction of a first type or a jump instruction of a second type according to the relationship between the jump instruction and the groups.
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公开(公告)号：US20240214673A1
公开(公告)日：2024-06-27
申请号：US18505351
申请日：2023-11-09
Applicant: SigmaStar Technology Ltd.
Inventor： Ming-Hui PENG
CPC classification number: H04N23/66 , H04N5/2624
Abstract: An image system includes multiple data transmitting interface circuits, multiple video input interface circuits and an auto-exposure control circuit. Each of the data transmitting circuits is triggered according to a first control signal and a second control signal to provide exposure parameter data to a corresponding one of multiple image sensors. The video input interface circuits receive multiple sets of image data from the image sensors, respectively, wherein the second control signal is associated with a frame timing of at least one set of the image data. The auto-exposure control circuit receives the image data from the video input interface circuits, updates the exposure parameter data according to the image data, and generates the first control signal after the exposure parameter data is updated.
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公开(公告)号：US20240210972A1
公开(公告)日：2024-06-27
申请号：US18508342
申请日：2023-11-14
Applicant: SigmaStar Technology Ltd.
Inventor： Wei-Ping WANG , Jyun-Jie YANG
IPC: G05F1/46
CPC classification number: G05F1/462
Abstract: A digital circuitry includes a reference voltage generator, a rail-to-rail low-dropout regulator and a logic circuit. The reference voltage generator generates a plurality of reference voltages. The rail-to-rail low-dropout regulator generates a plurality of control signals according to the reference voltages, and generates a plurality of driving voltages according to the control signals, wherein the driving voltages have the same variation tendency. The logic circuit operates in a voltage interval between the driving voltages.
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公开(公告)号：US12009814B2
公开(公告)日：2024-06-11
申请号：US18084799
申请日：2022-12-20
Applicant: SigmaStar Technology Ltd.
Inventor： Chao-Chun Sung , Che-Lun Hsu , Chang-Han Li
IPC: H03K19/0175 , H03K19/017 , H03K19/0185 , H03K19/173 , H03K19/20
CPC classification number: H03K19/017 , H03K19/018507 , H03K19/1737 , H03K19/20
Abstract: A level shifter includes a low-level adjustment circuit, a comparator circuit, and a high-level adjustment circuit. The low-level adjustment circuit pulls down a level of one between a first input node and a second input node to a first low supply voltage. The comparator outputs a one having higher level between the level of the first input node and a second low supply voltage to a first output node, wherein the second low supply voltage is higher than the first low supply voltage. The high-level adjustment circuit selectively adjusts the level of the first output node according to the level of the first input node and the level of the second input node to generate an output signal.
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