摘要:
A computer system is provided with an antenna which disables inappropriate wireless communications when a communication controller is inconsistently connected with the antenna. The computer having a diversity antenna connected to a detachable wireless LAN card containing a controller for providing wireless communication is mounted in a mini PCI slot, comprising a switch device for recognizing the identification information (ID) of the wireless LAN card to be mounted by BIOS executed on a CPU, in which the connection between the diversity antenna and the wireless LAN card is maintained in an off state (default) as an initial state in which the wireless LAN card is mounted, and the connection is enabled based on the identification information recognized by the BIOS.
摘要:
A computer system is provided with an antenna which disables inappropriate wireless communications when a communication controller is inconsistently connected with the antenna. The computer having a diversity antenna connected to a detachable wireless LAN card containing a controller for providing wireless communication is mounted in a mini PCI slot, comprising a switch device for recognizing the identification information (ID) of the wireless LAN card to be mounted by BIOS executed on a CPU, in which the connection between the diversity antenna and the wireless LAN card is maintained in an off state (default) as an initial state in which the wireless LAN card is mounted, and the connection is enabled based on the identification information recognized by the BIOS.
摘要:
A computer system is provided with an antenna which disables inappropriate wireless communications when a communication controller is inconsistently connected with the antenna. The computer having a diversity antenna connected to a detachable wireless LAN card containing a controller for providing wireless communication is mounted in a mini PCI slot, comprising a switch device for recognizing the identification information (ID) of the wireless LAN card to be mounted by BIOS executed on a CPU, in which the connection between the diversity antenna and the wireless LAN card is maintained in an off state (default) as an initial state in which the wireless LAN card is mounted, and the connection is enabled based on the identification information recognized by the BIOS.
摘要:
A display apparatus, comprising a display having a longitudinal edge and a latitudinal edge, where the longitudinal edge is longer than the latitudinal edge, a first supporting member having an upper end portion rotatably coupled to the display and a lower end portion rotatably coupled to a base, wherein the display is configured to be rotatable between a first position in which the longitudinal edge is substantially in parallel with the base and a second position in which the longitudinal edge is substantially perpendicular to the base.
摘要:
A display apparatus, comprising a display having a longitudinal edge and a latitudinal edge, where the longitudinal edge is longer than the latitudinal edge, a first supporting member having an upper end portion rotatably coupled to the display and a lower end portion rotatably coupled to a base, wherein the display is configured to be rotateable between a first position in which the longitudinal edge is substantially in parallel with the base and a second position in which the longitudinal edge is substantially perpendicular to the base.
摘要:
An information processing system operates under a multi-tasking operating system in which each task to be run is assigned a priority level. A Clock Switch (41) is positioned between the Clock Oscillator (50) and the Processor (10). A System Timer (70) establishes periodic intervals of time. At the beginning of each time interval, the System Timer, via an Interrupt Controller (60) and Transition Detector (42), turns ON (if its not already ON) the clock to the Processor by sending a Clock Start Signal to the Clock Switch. A Clock Control Program is assigned the lowest priority such that the Clock Control Program runs if and only if there are no other tasks running. When the Clock Control Program runs, it sends a code to a Register (43), which in turn sends a Clock Stop signal to the Clock Switch, thereby stopping the clock to the Processor. As described above, the System Timer will restart the clock again at the beginning of the next time interval. By stopping the clock to the Processor, the power to and the heat dissipated by the Processor are reduced. In an alternate embodiment, the frequency of the clock signal to the processor is reduced, rather than completely stopping the clock to the Processor.