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    Liquid crystal display and method of manufacturing the same
    1.
    发明授权
    Liquid crystal display and method of manufacturing the same 有权
    液晶显示器及其制造方法

    公开(公告)号：US09256107B2

    公开(公告)日：2016-02-09

    申请号：US12481858

    申请日：2009-06-10

    申请人： In-Woo Kim ,  Yi Li ,  Jang-Il Kim ,  Seong-Jun Lee ,  Eun Cho ,  Seon-Hong Ahn ,  Seung-Hyun Hur ,  Jae-Young Lee ,  Ji-Hyeon Son ,  Jae-Yong Shin

    发明人： In-Woo Kim ,  Yi Li ,  Jang-Il Kim ,  Seong-Jun Lee ,  Eun Cho ,  Seon-Hong Ahn ,  Seung-Hyun Hur ,  Jae-Young Lee ,  Ji-Hyeon Son ,  Jae-Yong Shin

    IPC分类号： G02F1/1343 ,  G02F1/1362 ,  G02F1/139

    CPC分类号： G02F1/134336 ,  G02F1/136213 ,  G02F1/1393

    摘要： A liquid crystal display includes a first substrate and a second substrate facing the first substrate, a gate line and a data line disposed on the first substrate, and a pixel electrode disposed on the first substrate. The pixel electrode is connected to the gate line and the data line, and includes subregions. The liquid crystal display further includes a storage electrode disposed on the first substrate overlapping the pixel electrode to form a storage capacitor, a common electrode disposed on the second substrate, and a liquid crystal layer interposed between the pixel electrode and the common electrode and including liquid crystal molecules disposed therein. The pixel electrode includes a stem defining boundaries between the subregions, and a width of the stem changes from a center portion of the pixel electrode to a peripheral portion of the pixel electrode.

    摘要翻译： 液晶显示器包括第一基板和面向第一基板的第二基板，设置在第一基板上的栅极线和数据线以及设置在第一基板上的像素电极。 像素电极连接到栅极线和数据线，并且包括子区域。 所述液晶显示装置还具备：与所述像素电极重叠的第一基板上设置的存储电极，形成存储电容器，配置在所述第二基板上的公共电极，以及夹在所述像素电极与所述公共电极之间的液晶层， 配置在其中的晶体分子。 像素电极包括限定子区域之间的边界的杆，并且杆的宽度从像素电极的中心部分到像素电极的周边部分变化。

    Integrated circuit
    4.
    发明授权
    Integrated circuit 有权
    集成电路

    公开(公告)号：US08610475B2

    公开(公告)日：2013-12-17

    申请号：US12981764

    申请日：2010-12-30

    申请人： Yong-Ju Kim ,  Seong-Jun Lee ,  Hae-Rang Choi ,  Jae-Min Jang

    发明人： Yong-Ju Kim ,  Seong-Jun Lee ,  Hae-Rang Choi ,  Jae-Min Jang

    IPC分类号： H03L7/06

    CPC分类号： H03L7/0816

    摘要： An integrated circuit includes a delay locked loop configured to delay a reference clock signal by a delay time for delay locking and generate a delay locked clock signal, a clock transmission circuit configured to transmit the delay locked clock signal in response to a clock transmission signal, a duty correction circuit configured to perform duty correction operation on an output clock signal of the clock transmission circuit, and a clock transmission signal generation circuit configured to generate the clock transmission signal in response to a command and burst length information.

    摘要翻译： 一种集成电路包括：延迟锁定环路，被配置为延迟参考时钟信号延迟锁定的延迟时间，并产生延迟锁定时钟信号;时钟传输电路，被配置为响应于时钟传输信号传输延迟锁定时钟信号; 配置为对时钟发送电路的输出时钟信号进行占空比校正操作的占空比校正电路，以及响应于命令和突发长度信息而生成时钟发送信号的时钟发送信号生成电路。

    Tilt-type sliding module for mobile phone and terminal holder using the same
    5.
    发明授权
    Tilt-type sliding module for mobile phone and terminal holder using the same 有权
    用于移动电话和终端座的倾斜式滑动模块

    公开(公告)号：US08238986B2

    公开(公告)日：2012-08-07

    申请号：US13146285

    申请日：2009-12-26

    申请人： Seong-Jun Lee ,  Sang-Wha Park ,  Jeong-Min Park ,  Han-Gyu Hwang ,  Sung-Ho Ahn

    发明人： Seong-Jun Lee ,  Sang-Wha Park ,  Jeong-Min Park ,  Han-Gyu Hwang ,  Sung-Ho Ahn

    IPC分类号： H04W88/02

    CPC分类号： H04M1/0237 ,  H04M1/0216

    摘要： Provided are a tilt-type sliding module for a mobile phone and a terminal holder using the tilt-type sliding module, which enable a display unit of the mobile phone to perform a planar sliding motion and at the same time, to perform a tilt motion for inclining upwardly, thereby providing optimal convenience according to a user's purpose. The tilt-type sliding module allows a stable tilt motion of the display unit of the mobile phone by means of: a control bracket for controlling a rotation motion of a tilt rotation portion formed on each of both ends of a frame and a rotation motion and a lock motion of the tilt rotation portion by being fixedly coupled to an intermediate member of the mobile phone; a stopper shaft; and a spring ball.

    摘要翻译： 提供了一种用于移动电话的倾斜式滑动模块和使用倾斜型滑动模块的终端支架，其使得移动电话的显示单元能够执行平面滑动运动，并且同时执行倾斜运动 用于向上倾斜，从而根据用户的目的提供最佳便利。 倾斜式滑动模块通过以下方式允许移动电话的显示单元的稳定的倾斜运动：控制支架，用于控制形成在框架的两端和旋转运动中的每一个上的倾斜旋转部分的旋转运动;以及 通过固定地联接到移动电话的中间构件的倾斜旋转部分的锁定运动; 止动轴; 和一个弹簧球。

    DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    显示装置及其制造方法

    公开(公告)号：US20110222010A1

    公开(公告)日：2011-09-15

    申请号：US13043034

    申请日：2011-03-08

    申请人： Jae-Young Lee ,  Ju-Yeon Seo ,  Seong-Jun Lee ,  Yi Li ,  Seong-Ryong Lee ,  Yong-Kyu Jang

    发明人： Jae-Young Lee ,  Ju-Yeon Seo ,  Seong-Jun Lee ,  Yi Li ,  Seong-Ryong Lee ,  Yong-Kyu Jang

    IPC分类号： G02F1/1343 ,  H01J9/20

    CPC分类号： G02F1/134336 ,  G02F1/133788 ,  G02F2001/133726 ,  G02F2001/133776

    摘要： A display device having an improved viewing angle by using a linear polarization structure, and a method of manufacturing the same. The display device includes a first substrate arrangement including a domain forming layer and a pixel electrode arranged on the domain forming layer, the pixel electrode having a cross type opening pattern, a second substrate arrangement including a common electrode arranged on an entire surface that faces the first substrate arrangement and a liquid crystal layer arranged between the first substrate arrangement and the second substrate arrangement, the liquid crystal layer including a plurality of liquid crystal molecules and a reactive mesogen to fix liquid crystal molecules and to produce a liquid crystal domain based on the cross type opening pattern.

    摘要翻译： 通过使用线偏振结构具有改善的视角的显示装置及其制造方法。 显示装置包括：第一基板装置，其包括域形成层和布置在畴形成层上的像素电极，像素电极具有交叉型开口图案;第二基板布置，包括布置在面向 第一衬底布置和布置在第一衬底布置和第二衬底布置之间的液晶层，液晶层包括多个液晶分子和反应性液晶原子，用于固定液晶分子并基于该液晶分子产生液晶畴 十字型开口图案。

    SKEW DETECTOR AND SEMICONDUCTOR MEMORY DEVICE USING THE SAME
    7.
    发明申请
    SKEW DETECTOR AND SEMICONDUCTOR MEMORY DEVICE USING THE SAME 有权
    使用它的SKEW检测器和半导体存储器件

    公开(公告)号：US20110158010A1

    公开(公告)日：2011-06-30

    申请号：US12648335

    申请日：2009-12-29

    申请人： Seong-Jun LEE

    发明人： Seong-Jun LEE

    IPC分类号： G11C7/00 ,  G11C8/18 ,  H03K5/00

    CPC分类号： H03K19/00323 ,  G11C29/02 ,  G11C29/022 ,  G11C29/023 ,  G11C29/50012

    摘要： A skew detection circuit includes a data sensing block configured to sense a first data that is transferred earliest and a last data that is transferred latest among a plurality of data which are transferred through different transfer paths, and generate a sensing result signal; and a detection signal generation block configured to compare an output signal of the data sensing block with a certain time, and generate a skew detection signal.

    摘要翻译： 歪斜检测电路包括：数据感测块，被配置为感测最早传送的第一数据;以及最后数据，其通过不同的传送路径传送的多个数据中最后传送，并产生感测结果信号; 以及检测信号生成块，被配置为将数据感测块的输出信号与一定时间进行比较，并生成偏斜检测信号。

    Semiconductor memory device capable of easily performing delay locking operation under high frequency system clock
    8.
    发明授权
    Semiconductor memory device capable of easily performing delay locking operation under high frequency system clock 有权
    半导体存储器件能够在高频系统时钟下容易地执行延迟锁定操作

    公开(公告)号：US07956659B2

    公开(公告)日：2011-06-07

    申请号：US11647645

    申请日：2006-12-29

    申请人： Min-Young You ,  Seong-Jun Lee

    发明人： Min-Young You ,  Seong-Jun Lee

    IPC分类号： H03L7/00

    CPC分类号： H03L7/0812 ,  G06F1/04 ,  G11C7/22 ,  G11C7/222 ,  H03K5/1565

    摘要： A semiconductor memory device includes a first clock buffer for outputting a first internal clock signal in response to an inverted signal of the system clock signal and for correcting a duty cycle ratio of the first internal clock signal in response to a control signal; a second clock buffer for outputting a second internal clock signal in response to the system clock signal and for correcting a duty cycle ratio of the second internal clock signal in response to the control signal; an analog duty cycle correction circuit for outputting the control signal corresponding to the duty cycle ratio of the first and second internal clock signals; a mixing circuit for mixing the first and second internal clock signals and for outputting a third internal clock signal whose duty cycle is corrected; and a DLL circuit for outputting a delay-locked clock signal by using the third internal clock signal.

    摘要翻译： 半导体存储器件包括：第一时钟缓冲器，用于响应于系统时钟信号的反相信号输出第一内部时钟信号，并用于响应于控制信号来校正第一内部时钟信号的占空比; 第二时钟缓冲器，用于响应于所述系统时钟信号输出第二内部时钟信号，并用于响应于所述控制信号来校正所述第二内部时钟信号的占空比; 模拟占空比校正电路，用于输出对应于第一和第二内部时钟信号的占空比的控制信号; 混合电路，用于混合第一和第二内部时钟信号，并输出其占空比被校正的第三内部时钟信号; 以及DLL电路，用于通过使用第三内部时钟信号输出延迟锁定时钟信号。