ROBOT ARM AND ROBOT WRIST
    1.
    发明申请

    公开(公告)号:US20180243928A1

    公开(公告)日:2018-08-30

    申请号:US15752705

    申请日:2016-08-10

    Applicant: Sami HADDADIN

    Inventor: Sami HADDADIN

    Abstract: The invention relates to a robot arm and a robot wrist. The robot arm comprises a number N of actuator-drivable joint connections GVn, which are connected in series via arm links GLi, where n=1, 2, . . . , N, and i=1, 2, . . . , N−1, and N≥6, wherein the proximal arm link GL1 of the robot arm can be connected to a robot body via the joint connection GV1, the distal arm link GLN-1 of the robot arm can be connected to an effector E via the joint connection GVN, the arm links GLN-1 and GLN-2 are connected via the joint connection GVN-1 and the arm links GLN-2 and GLN-3 are connected via the joint connection GVN-2, and each of the joint connections GVN, GVN-1, GVN-2 enables a movement about an axis of rotation RGV,N, RGV,N-1, RGV,N-2 assigned to the same. The robot arm is configured in such a way that the axes of rotation RGV,N-2 and RGV,N-1 intersect at an angle in the range from 50 to 130° or the axes of rotation RGV,N-2 and RGV,N-1 have a minimum spacing A1 from each other in the range from 1 mm to 20 mm, the axis of rotation RGV,N is arranged radially at a constant distance D1 from the axis of rotation RGV,N-1, and a sensor is present in the joint connection GVN-1 to detect a force or a torque about the axis of rotation RGV,N-1.

    Parallel DSP demodulation for wideband software-defined radios
    2.
    发明授权
    Parallel DSP demodulation for wideband software-defined radios 有权
    用于宽带软件定义无线电的并行DSP解调

    公开(公告)号:US07697641B2

    公开(公告)日:2010-04-13

    申请号:US10878902

    申请日:2004-06-28

    CPC classification number: H04B1/0092 H04B1/0003 H04B1/28 H04L7/0029 H04L7/0332

    Abstract: A demodulator, suitable for use in a communication system and in a modem, has a block polyphase circuit with circuit blocks for different signal processing functions, particularly filtering, delay, and frequency conversion. The circuit blocks are arranged for parallel processing of different portions of an input sequence of signals. Signals of the input sequence to be filtered are divided among the blocks by a demultiplexer for processing at a clock frequency lower than a clock frequency of the input signal sequence. Signals outputted by groups of the circuit blocks are summed to produce an output signal of the group. Output signals of all of the groups are multiplexed to provide an output signal sequence such that the repetition frequency of the outputted signals may be higher, lower, or equal to that of the input signal sequence. This enables use of programmable circuitry operative at reduced clock rates.

    Abstract translation: 适用于通信系统和调制解调器的解调器具有块多相电路,具有用于不同信号处理功能的电路块,特别是滤波,延迟和频率转换。 电路块被布置用于对输入信号序列的不同部分进行并行处理。 要被滤波的输入序列的信号由解复用器在块之间划分,以在低于输入信号序列的时钟频率的时钟频率处理。 将由电路块的组输出的信号相加以产生该组的输出信号。 所有组的输出信号被复用以提供输出信号序列,使得输出信号的重复频率可以高于,低于或等于输入信号序列的重复频率。 这使得可以使用以降低的时钟速率工作的可编程电路。

    Parallel fractional interpolator with data-rate clock synchronization
    3.
    发明授权
    Parallel fractional interpolator with data-rate clock synchronization 有权
    具有数据速率时钟同步的并行分数插值器

    公开(公告)号:US07340024B1

    公开(公告)日:2008-03-04

    申请号:US10690898

    申请日:2003-10-22

    CPC classification number: H04L7/0029 H03H17/028 H03H17/0685 H04L7/0331

    Abstract: A circuit for single or parallel digital fractional interpolation of data samples has a fractional interpolator filter, an oscillator for outputting timing signals to the fractional interpolator filter, and a detector loop with a strobe feedback from the oscillator for outputting a frequency adjustment to the oscillator. Three different approaches are shown to determine the frequency adjustment. One approach is to generate a pulse based on the symbol clock, and measure the differences between the pulse and the strobe and between the strobe and the pulse. The smaller is the frequency adjustment. Another approach is to adjust the strobe period to match the symbol clock period. A third approach is to add an oscillator-driven clock to the symbol clock and integrate the sum over a symbol clock period to generate the frequency adjustment. Preferably, the interpolator filter takes N parallel inputs and samples each in parallel based on a plurality of oscillator timing signals, each corrected with reference to the frequency adjustment.

    Abstract translation: 用于数据样本的单或数位分数插值的电路具有分数内插滤波器,用于向定时内插滤波器输出定时信号的振荡器,以及具有来自振荡器的选通反馈的检测器回路,用于向振荡器输出频率调整。 显示了三种不同的方法来确定频率调整。 一种方法是基于符号时钟产生脉冲,并测量脉冲与选通脉冲之间以及选通脉冲与脉冲之间的差异。 频率调整越小。 另一种方法是调整选通周期以匹配符号时钟周期。 第三种方法是将振荡器驱动的时钟添加到符号时钟,并在符号时钟周期内积分并产生频率调整。 优选地,内插器滤波器根据多个振荡器定时信号并行地并联N个并行输入和采样,每个振荡器定时信号经参考频率调整进行校正。

    DRIVE UNIT FOR A ROBOT AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20190134811A1

    公开(公告)日:2019-05-09

    申请号:US16095326

    申请日:2017-04-20

    Abstract: The present invention relates to a drive unit for joint being arranged between two arm members of a manipulator of a robotic system, the drive unit being intended for the rotatory drive of the one arm member in relation to the other arm member, having a first drive module, which is to be connected to a first arm member by means of at least one connecting element in a force- and torque-transmitting manner, and having a second drive module, which is to be connected with a second arm member by means of at least one connecting element in a force- and torque-transmitting manner, in which the connecting elements are configured to cooperate with the arm members in radial direction with respect to the rotary axis of the drive unit.

    Parallel filter realization for wideband programmable digital radios
    6.
    发明授权
    Parallel filter realization for wideband programmable digital radios 有权
    宽带可编程数字无线电并行滤波器实现

    公开(公告)号:US07747666B2

    公开(公告)日:2010-06-29

    申请号:US10914554

    申请日:2004-08-09

    Abstract: A block polyphase filter is constructed of a set of filter blocks having different filter functions, and being arranged for parallel processing of portions of an input sequence of signals. Signals of the input sequence are divided among the blocks by a demultiplexer for processing at a clock frequency lower than a clock frequency of the input signal sequence. The filter blocks are arranged in groups, wherein output signals of the blocks in any one group are summed to produce an output signal of the filtered group. Output signals of all of the filter groups are multiplexed to provide an output signal sequence wherein the repetition frequency of the signals may be higher, lower, or equal to the repetition frequency of the input signal sequence depending upon the ratio of the number of filter groups to the number of filter blocks in the set of filter blocks.

    Abstract translation: 块多相滤波器由具有不同滤波器功能的一组滤波器块构成,并被布置用于并行处理输入信号序列的部分。 输入序列的信号由解复用器在块之间分割,以便在低于输入信号序列的时钟频率的时钟频率处理。 滤波器块被分组布置,其中将任一组中的块的输出信号相加以产生滤波组的输出信号。 所有滤波器组的输出信号被多路复用以提供输出信号序列,其中信号的重复频率可以更高,更低或等于输入信号序列的重复频率,这取决于滤波器组的数量 到滤波器块集合中的滤波器块的数量。

    Symbol timing correction for a phase modulated signal with mutually interfering symbols
    7.
    发明授权
    Symbol timing correction for a phase modulated signal with mutually interfering symbols 有权
    具有相互干扰符号的相位调制信号的符号定时校正

    公开(公告)号:US07233632B1

    公开(公告)日:2007-06-19

    申请号:US10646259

    申请日:2003-08-21

    Abstract: A circuit and method for correcting timing of a received phase modulated signal. The method uses k most recently received data bits as an address for a lookup table 60. The lookup table includes reconstructed waveforms from which a timing weighing factor is determined. The received PM from time t1 is delayed, phase adjusted, and multiplied by the timing weighing factor, the product of which is used by a timing adjust block 50 to adjust timing of the PM signal at a time after t1. The circuit inputs a PM signal to a timing adjust block 50. The output is split between a matched filter 54 and a loop phase shifter 78. The matched filter feeds alternating I and Q bits into a register 58 that holds k data bits, which are used as an address for a lookup table 60. The output of the lookup table 60 becomes a timing weighing figure, which is multiplied 74 with an output of the loop phase shifter 78 and then input into the timing adjust block 50 for adjusting timing of a PM signal. Phase error may be corrected with minor additional components.

    Abstract translation: 一种用于校正接收相位调制信号定时的电路和方法。 该方法使用k个最近接收的数据比特作为查找表60的地址。 查找表包括确定定时加权因子的重建波形。 从时间t 1 1接收的PM被延迟,相位调整并乘以定时加权因子,其乘积由定时调整块50用于一次调整PM信号的定时 在t 1之后。 电路将PM信号输入到定时调整块50。 输出在匹配滤波器54和环路移相器78之间分开。 匹配滤波器将交替的I和Q位馈送到寄存器58,寄存器58保存k个数据位,这些数据位用作查找表60的地址。 查找表60的输出成为定时加权图,其与环路移相器78的输出相乘74,然后输入到定时调整块50中,以调整PM信号的定时。 相位误差可以用较小的附加组件来校正。

    CONNECTION ASSEMBLY OF A TRANSMISSION IN A STRUCTURE

    公开(公告)号:US20190154086A1

    公开(公告)日:2019-05-23

    申请号:US15752691

    申请日:2016-08-12

    Abstract: The invention relates to a connection assembly between a drive-side structure and a transmission outer ring sealing a transmission arranged radially inside, wherein an annular space comprising a connection element arranged therein is configured between the transmission outer ring and the drive-side structure, and a peripheral guide is axially configured at least on one side of the annular space between the transmission outer ring and the drive-side structure, wherein the connection element comprises bulges which are spaced over the peripheral extension and are elastically deformable and forms a force-fit connection between the transmission outer ring and the drive-side structure when the bulges elastically deform.

    ROBOT SYSTEM
    9.
    发明申请
    ROBOT SYSTEM 审中-公开

    公开(公告)号:US20180345505A1

    公开(公告)日:2018-12-06

    申请号:US15766083

    申请日:2016-10-10

    Applicant: Sami Haddadin

    Inventor: Sami Haddadin

    Abstract: The invention relates to a robotic system with at least one robotic arm and a control unit, which is designed so that it can preset at least one predefined operation that can be carried out by the robotic system. In addition, the robotic system comprises at least one input device attached to the robotic arm which is designed so that the predefined operations of the robotic system can be parameterized by means of the input device. In this case, the input device is designed so that it can provide a user-directed feedback to a user of the robotic system when setting the execution of operations, the logical sequence of the operations and/or parameterizing the predefined operations for the robotic system.

Patent Agency Ranking