公开(公告)号：US20110148524A1

公开(公告)日：2011-06-23

申请号：US12646329

申请日：2009-12-23

申请人： Said Abdelli ,  Jeffrey Kriz

发明人： Said Abdelli ,  Jeffrey Kriz

IPC分类号： H03F3/45

CPC分类号： H03F3/45237 ,  H03F3/1935 ,  H03F2200/451

摘要： Systems, methods, and devices for receiving a differential input signal and generating a non-differential output signal are described herein. For example, an RF buffer is described that includes first and second transistor elements. The first transistor element receives a first polarity signal of a differential signal and drives a non-differential output of the RF buffer. A second transistor element receives a second polarity signal of the differential signal and drives the non-differential output of the RF buffer. The first and second transistor elements substantially simultaneously drive the non-differential output of the RF buffer.

摘要翻译： 这里描述了用于接收差分输入信号并产生非差分输出信号的系统，方法和设备。 例如，描述了包括第一和第二晶体管元件的RF缓冲器。 第一晶体管元件接收差分信号的第一极性信号并驱动RF缓冲器的非差分输出。 第二晶体管元件接收差分信号的第二极性信号并驱动RF缓冲器的非差分输出。 第一和第二晶体管元件基本上同时驱动RF缓冲器的非差分输出。

公开(公告)号：US20090212845A1

公开(公告)日：2009-08-27

申请号：US12119305

申请日：2008-05-12

申请人： Said Abdelli ,  Jeffrey Kriz

发明人： Said Abdelli ,  Jeffrey Kriz

IPC分类号： H03K17/687 ,  H03K17/56

CPC分类号： H03K17/10

摘要： A high voltage control switch including a voltage controller and a control switch is provided. The high voltage control switch splits the control switching of high voltages into two ranges. The voltage controller determines the on and off voltages appropriate for the application based on the range the input signal is in. The control switch then outputs the appropriate voltages determined by the voltage controller based on a logic input. As such, the high voltage control switch provides fast and reliable operation for high voltage switching applications.

摘要翻译： 提供一种包括电压控制器和控制开关的高压控制开关。 高压控制开关将高电压的控制切换分为两个范围。 电压控制器基于输入信号的范围来确定适合于应用的导通和关断电压。然后，控制开关基于逻辑输入输出由电压控制器确定的适当电压。 因此，高压控制开关为高电压开关应用提供快速可靠的操作。

公开(公告)号：US20070247174A1

公开(公告)日：2007-10-25

申请号：US11408870

申请日：2006-04-20

申请人： Said Abdelli

发明人： Said Abdelli

IPC分类号： G01R27/08

CPC分类号： G01R19/1659

摘要： Signal coincidence detection circuits and methods implemented in such circuits are disclosed. An example signal coincidence detection circuit includes a first differential transistor pair, a second differential transistor pair coupled with the first differential transistor pair and a third differential transistor pair coupled with the first differential transistor pair in parallel with the second differential transistor pair. The circuit also includes a first input signal terminal coupled with the first, second and third differential transistor pairs, wherein, in operation, the first input signal terminal receives a first input signal that is communicated to the first, second and third differential transistor pairs. The circuit further includes a second input signal terminal coupled with the first, second and third differential transistor pairs, wherein, in operation, the second input signal terminal receives a second input signal that is communicated to the first, second and third differential transistor pairs. The circuit additionally includes a current source coupled with the first differential transistor pair, where, in operation, a plurality of currents of the second and third differential transistor pairs are combined such that the combined currents indicate whether or not coincidence between the first and second input signals exists.

摘要翻译： 公开了在这种电路中实现的信号一致检测电路和方法。 示例信号一致检测电路包括第一差分晶体管对，与第一差分晶体管对耦合的第二差分晶体管对和与第二差分晶体管对并联的第一差分晶体管对耦合的第三差分晶体管对。 电路还包括与第一，第二和第三差分晶体管对耦合的第一输入信号端子，其中在操作中，第一输入信号端子接收与第一，第二和第三差分晶体管对通信的第一输入信号。 电路还包括与第一，第二和第三差分晶体管对耦合的第二输入信号端子，其中，在操作中，第二输入信号端子接收传送到第一，第二和第三差分晶体管对的第二输入信号。 电路还包括与第一差分晶体管对耦合的电流源，其中在操作中组合第二和第三差分晶体管对的多个电流，使得组合电流指示第一和第二输入之间是否一致 信号存在。

公开(公告)号：US20070188229A1

公开(公告)日：2007-08-16

申请号：US11355673

申请日：2006-02-16

申请人： Said Abdelli

发明人： Said Abdelli

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F2203/45194 ,  H03F2203/45244 ,  H03F2203/45478 ,  H03F2203/45641 ,  H03F2203/45686 ,  H03F2203/45691 ,  H03G1/007

摘要： Variable gain amplifier (VGA) circuits and methods implemented in such circuits are disclosed. An example VGA circuit includes a differential transistor pair for receiving a differential input signal. The differential transistor pair, in operation, conducts a substantially constant current over a linear operating range of the variable gain amplifier circuit. The VGA circuit also includes a current source that is coupled with the differential transistor pair. The current source, in operation, provides the substantially constant current to the differential transistor pair. The VGA circuit further includes a variable resistance circuit coupled with the differential transistor pair. In operation, a resistance of the variable resistance circuit is adjusted such that a gain of the variable gain amplifier circuit is adjusted. Further, in operation, the VGA circuit produces a differential output signal, the differential output signal being an amplified version of the differential input signal.

摘要翻译： 公开了在这种电路中实现的可变增益放大器（VGA）电路和方法。 示例VGA电路包括用于接收差分输入信号的差分晶体管对。 在操作中，差分晶体管对在可变增益放大器电路的线性工作范围内传导基本恒定的电流。 VGA电路还包括与差分晶体管对耦合的电流源。 在操作中的电流源向差分晶体管对提供基本恒定的电流。 VGA电路还包括与差分晶体管对耦合的可变电阻电路。 在操作中，调整可变电阻电路的电阻，使得可变增益放大器电路的增益被调整。 此外，在操作中，VGA电路产生差分输出信号，差分输出信号是差分输入信号的放大版本。

公开(公告)号：US5136250A

公开(公告)日：1992-08-04

申请号：US563867

申请日：1990-08-07

申请人： Said Abdelli

发明人： Said Abdelli

IPC分类号： G01B7/02

CPC分类号： G01B7/023

摘要： A capacitance-type height gage for measuring the distance between a test probe and a surface includes comparison circuitry for detecting the phase angle difference between the test probe signal and a reference signal. The reference signal having an adjustable phase angle. Phase angle comparison is achieved by multiplying the test probe signal with the reference signal and filtering the output. The filtered output is inversely proportional to the distance between the test probe and the surface. Compensation circuitry is included for cancelling stray capacitance.

摘要翻译： 用于测量测试探针和表面之间的距离的电容型高度计包括用于检测测试探针信号和参考信号之间的相位角差的比较电路。 参考信号具有可调节的相位角。 通过将测试探头信号与参考信号相乘并对输出进行滤波来实现相位角比较。 滤波后的输出与测试探针与表面之间的距离成反比。 包括补偿电路以消除杂散电容。

公开(公告)号：US20070170973A1

公开(公告)日：2007-07-26

申请号：US11341350

申请日：2006-01-26

申请人： Said Abdelli

发明人： Said Abdelli

IPC分类号： G06F7/44

CPC分类号： H03D7/1416

摘要： Mixer circuits with direct-current bias are disclosed. An example embodiment of such a mixer includes a first differential transistor pair and a second differential transistor pair. The example mixer also includes first and second local oscillator signal terminals and first and second mixed signal terminals. The first and second local oscillator signal terminals are coupled with the first and second differential transistor pairs. The first mixed signal terminal is coupled with the first differential pair and the second mixed signal terminal is coupled with the second differential pair. The mixer further includes first and second baseband signal terminals, where each baseband signal terminal is coupled with the first differential pair and the second differential pair. The mixer still further includes a first current source and a second current source. The first current source is coupled with the first differential pair and the first mixed signal terminal, and provides a first direct-current bias to the first differential pair. The second current source is coupled with the second differential pair and the second mixed signal terminal, and provides a second direct-current bias to the second differential pair.

摘要翻译： 公开了具有直流偏压的混频器电路。 这种混频器的示例性实施例包括第一差分晶体管对和第二差分晶体管对。 该示例混频器还包括第一和第二本地振荡器信号端子以及第一和第二混合信号端子。 第一和第二本地振荡器信号端子与第一和第二差分晶体管对耦合。 第一混合信号端子与第一差分对耦合，第二混合信号端子与第二差分对耦合。 混频器还包括第一和第二基带信号端子，其中每个基带信号端子与第一差分对和第二差分对耦合。 混合器还包括第一电流源和第二电流源。 第一电流源与第一差分对和第一混合信号端耦合，并向第一差分对提供第一直流偏置。 第二电流源与第二差分对和第二混合信号端耦合，并向第二差分对提供第二直流偏置。

公开(公告)号：US20050221775A1

公开(公告)日：2005-10-06

申请号：US11144343

申请日：2005-06-03

申请人： Said Abdelli

发明人： Said Abdelli

IPC分类号： H03D7/14 ,  H04B1/18 ,  H04B1/26

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D2200/0023 ,  H03D2200/0043 ,  H03D2200/0084 ,  H03D2200/0088 ,  H04B1/18

摘要： A mixer circuit is disclosed that includes a first mixer stage including first and second transmission gates. The mixer circuit also includes a second mixer stage including third and fourth transmission gates. The mixer further includes a first base band signal terminal coupled with the first and second transmission gates and a second base band signal terminal coupled with the third and fourth transmission gates. The mixer circuit processes signals so as to mix a base band signal communicated to the first and second base band signal terminals with a differential LO signal communicated to first and second LO signal terminals to create a first mixed differential signal. Alternatively, the mixer extracts a base band signal from a mixed signal communicated to the first and second mixed signal terminals signal using the LO signal communicated to the first and second LO signal terminals.

摘要翻译： 公开了一种混频器电路，其包括包括第一和第二传输门的第一混频器级。 混频器电路还包括包括第三和第四传输门的第二混频器级。 混频器还包括与第一和第二传输门极耦合的第一基带信号端子和与第三和第四传输门极耦合的第二基带信号端子。 混频器电路处理信号，以将通信给第一和第二基带信号端子的基带信号与传送到第一和第二LO信号端子的差分LO信号混合，以产生第一混合差分信号。 或者，混合器使用传送给第一和第二LO信号端子的LO信号从传送到第一和第二混合信号端子信号的混合信号中提取基带信号。

公开(公告)号：US08098097B2

公开(公告)日：2012-01-17

申请号：US12646329

申请日：2009-12-23

申请人： Said Abdelli ,  Jeffrey Kriz

发明人： Said Abdelli ,  Jeffrey Kriz

IPC分类号： H03F3/45

CPC分类号： H03F3/45237 ,  H03F3/1935 ,  H03F2200/451

摘要： Systems, methods, and devices for receiving a differential input signal and generating a non-differential output signal are described herein. For example, an RF buffer is described that includes first and second transistor elements. The first transistor element receives a first polarity signal of a differential signal and drives a non-differential output of the RF buffer. A second transistor element receives a second polarity signal of the differential signal and drives the non-differential output of the RF buffer. The first and second transistor elements substantially simultaneously drive the non-differential output of the RF buffer.

摘要翻译： 这里描述了用于接收差分输入信号并产生非差分输出信号的系统，方法和设备。 例如，描述了包括第一和第二晶体管元件的RF缓冲器。 第一晶体管元件接收差分信号的第一极性信号并驱动RF缓冲器的非差分输出。 第二晶体管元件接收差分信号的第二极性信号并驱动RF缓冲器的非差分输出。 第一和第二晶体管元件基本上同时驱动RF缓冲器的非差分输出。

公开(公告)号：US08085091B2

公开(公告)日：2011-12-27

申请号：US12694734

申请日：2010-01-27

申请人： Said Abdelli ,  Jeffrey Kriz

发明人： Said Abdelli ,  Jeffrey Kriz

IPC分类号： H03F3/45

CPC分类号： H03F3/45201

摘要： Systems, methods, and devices provided herein are directed to improvements in gain control amplifiers that receive an input signal and generate an output signal with a selectively variable gain. A differential amplified gain stage receives an input signal and scales the input signal to generate a scaled signal. A gain adjust stage receives the scaled signal and an adjust signal and adjusts an amplitude of the scaled signal based on the adjust signal to generate an adjusted scaled signal. The adjusted scaled signal has a substantially constant impedance regardless of value of the adjust signal.

摘要翻译： 系统，方法和本文提供的装置被引导到在该接收输入信号并生成具有选择性可变增益的输出信号进行增益控制的放大器的改进。 差分放大增益级接收输入信号并缩放输入信号以产生缩放信号。 增益调整级接收缩放信号和调整信号，并且基于调整信号调整缩放信号的幅度，以产生经调整的缩放信号。 经调整的缩放信号具有基本上恒定的阻抗，而与调节信号的值无关。

公开(公告)号：US20110181357A1

公开(公告)日：2011-07-28

申请号：US12694734

申请日：2010-01-27

申请人： Said Abdelli ,  Jeffrey Kriz

发明人： Said Abdelli ,  Jeffrey Kriz

IPC分类号： H03F3/45

CPC分类号： H03F3/45201

摘要： Systems, methods, and devices provided herein are directed to improvements in gain control amplifiers that receive an input signal and generate an output signal with a selectively variable gain. A differential amplified gain stage receives an input signal and scales the input signal to generate a scaled signal. A gain adjust stage receives the scaled signal and an adjust signal and adjusts an amplitude of the scaled signal based on the adjust signal to generate an adjusted scaled signal. The adjusted scaled signal has a substantially constant impedance regardless of value of the adjust signal.

摘要翻译： 本文提供的系统，方法和装置涉及增益控制放大器的改进，所述增益控制放大器接收输入信号并产生具有选择性可变增益的输出信号。 差分放大增益级接收输入信号并缩放输入信号以产生缩放信号。 增益调整级接收缩放信号和调整信号，并且基于调整信号调整缩放信号的幅度，以产生经调整的缩放信号。 经调整的缩放信号具有基本上恒定的阻抗，而与调节信号的值无关。