公开(公告)号：US08884387B2

公开(公告)日：2014-11-11

申请号：US13568670

申请日：2012-08-07

Applicant: Solomon Assefa ,  Michael C. Gaidis ,  Eric A. Joseph ,  Eugene J. O'Sullivan

Inventor： Solomon Assefa ,  Michael C. Gaidis ,  Eric A. Joseph ,  Eugene J. O'Sullivan

IPC: H01L29/82 ,  H01L27/22 ,  H01L43/12 ,  H01L43/08

CPC classification number: H01L43/12 ,  H01L27/222 ,  H01L43/08

Abstract: A semiconductor device includes a substrate including an M2 patterned area. A VA pillar structure is formed over the M2 patterned area. The VA pillar structure includes a substractively patterned metal layer. The VA pillar structure is a sub-lithographic contact. An MTJ stack is formed over the oxide layer and the metal layer of the VA pillar. A size of the MTJ stack and a shape anisotropy of the MTJ stack are independent of a size and a shape anisotropy of the sub-lithographic contact.

Abstract translation: 半导体器件包括包括M2图案化区域的衬底。 在M2图案化区域上形成VA柱结构。 VA柱结构包括一个减少图案化的金属层。 VA柱结构是亚光刻接触。 在氧化物层和VA柱的金属层上形成MTJ堆叠。 MTJ叠层的尺寸和MTJ叠层的形状各向异性独立于亚光刻触点的尺寸和形状各向异性。

公开(公告)号：US08796041B2

公开(公告)日：2014-08-05

申请号：US12549799

申请日：2009-08-28

Applicant: Solomon Assefa ,  Michael C. Gaidis ,  Eric A. Joseph ,  Eugene J. O'Sullivan

Inventor： Solomon Assefa ,  Michael C. Gaidis ,  Eric A. Joseph ,  Eugene J. O'Sullivan

IPC: H01L21/00

CPC classification number: H01L43/12 ,  H01L27/222 ,  H01L43/08

Abstract: A semiconductor device includes a substrate including an M2 patterned area. A VA pillar structure is formed over the M2 patterned area. The VA pillar structure includes a substractively patterned metal layer. The VA pillar structure is a sub-lithographic contact. An MTJ stack is formed over the oxide layer and the metal layer of the VA pillar. A size of the MTJ stack and a shape anisotropy of the MTJ stack are independent of a size and a shape anisotropy of the sub-lithographic contact.

公开(公告)号：US08772902B2

公开(公告)日：2014-07-08

申请号：US13451141

申请日：2012-04-19

Applicant: Solomon Assefa ,  William M. J. Green ,  Marwan H. Khater ,  Yurii A. Vlasov

Inventor： Solomon Assefa ,  William M. J. Green ,  Marwan H. Khater ,  Yurii A. Vlasov

IPC: H01L21/70

CPC classification number: G02B6/13 ,  H01L21/76232 ,  H01L21/76289

Abstract: Line trenches are formed in a stack of a bulk semiconductor substrate and an oxygen-impermeable layer such that the depth of the trenches in the bulk semiconductor substrate is greater than the lateral spacing between a pair of adjacently located line trenches. Oxygen-impermeable spacers are formed on sidewalls of the line trenches. An isotropic etch, either alone or in combination with oxidation, removes a semiconductor material from below the oxygen-impermeable spacers to expand the lateral extent of expanded-bottom portions of the line trenches, and to reduce the lateral spacing between adjacent expanded-bottom portions. The semiconductor material around the bottom portions is oxidized to form a semiconductor oxide portion that underlies multiple oxygen-impermeable spacers. Semiconductor-on-insulator (SOI) portions are formed above the semiconductor oxide portion and within the bulk semiconductor substrate.

Abstract translation: 线槽形成在体半导体衬底和不透氧层的堆叠中，使得体半导体衬底中的沟槽的深度大于一对相邻定位的线沟槽之间的横向间隔。 不透水间隔物形成在线沟槽的侧壁上。 单独或与氧化组合的各向同性蚀刻从氧不透性间隔物的下面去除半导体材料，以扩大线沟槽的扩展底部的横向范围，并且减小相邻扩展底部之间的横向间隔 。 底部周围的半导体材料被氧化以形成在多个不透氧隔离物下面的半导体氧化物部分。 半导体绝缘体（SOI）部分形成在半导体氧化物部分之上和体半导体衬底内。

公开(公告)号：US08765502B2

公开(公告)日：2014-07-01

申请号：US13561177

申请日：2012-07-30

Applicant: Solomon Assefa ,  Jeffrey P. Gambino ,  Steven M. Shank

Inventor： Solomon Assefa ,  Jeffrey P. Gambino ,  Steven M. Shank

IPC: H01L21/00 ,  H01L35/34 ,  H01L51/50

CPC classification number: H01L27/146 ,  H01L27/1443 ,  H01L31/022408 ,  H01L31/103 ,  H01L31/1808 ,  H01L35/34 ,  H01L51/50 ,  Y02E10/50

Abstract: A method of forming an integrated photonic semiconductor structure having a photodetector device and a CMOS device may include depositing a dielectric stack over the photodetector device such that the dielectric stack encapsulates the photodetector. An opening is etched into the dielectric stack down to an upper surface of a region of an active area of the photodetector. A first metal layer is deposited directly onto the upper surface of the region of the active area via the opening such that the first metal layer may cover the region of the active area. Within the same mask level, a plurality of contacts including a second metal layer are located on the first metal layer and on the CMOS device. The first metal layer isolates the active area from the occurrence of metal intermixing between the second metal layer and the active area of the photodetector.

Abstract translation: 形成具有光电检测器件和CMOS器件的集成光子半导体结构的方法可以包括在光电检测器器件上沉积电介质堆叠，使得电介质堆叠封装光电检测器。 电介质堆叠中的开口蚀刻到光电检测器的有源区域的区域的上表面。 第一金属层经由开口直接沉积在有源区域的区域的上表面上，使得第一金属层可以覆盖有源区域的区域。 在相同的掩模级内，包括第二金属层的多个触点位于第一金属层上和CMOS器件上。 第一金属层将活性区域与第二金属层和光电检测器的有源区域之间的金属混合的发生隔离。

公开(公告)号：US20140029949A1

公开(公告)日：2014-01-30

申请号：US13556603

申请日：2012-07-24

Applicant: Solomon Assefa ,  Douglas M. Gill ,  Jonathan E. Proesel ,  Alexander V. Rylyakov ,  Clint L. Schow

Inventor： Solomon Assefa ,  Douglas M. Gill ,  Jonathan E. Proesel ,  Alexander V. Rylyakov ,  Clint L. Schow

IPC: H04J14/02

CPC classification number: G02B6/12019 ,  H04B10/676 ,  H04B10/691 ,  H04B10/697 ,  H04B10/6972 ,  H04B17/20 ,  H04J14/02

Abstract: An electro-optical device includes an optical de-multiplexing portion operative to output a first optical signal having a first wavelength and a second optical signal having a second wavelength, an array of photodetectors, and a switching logic portion communicatively connected to the array of photodetectors, the switching logic portion operative to determine which photodetector of the array of photodetectors is converting the first optical signal into a first electrical signal and output the first electrical signal from a first output node associated with the first optical signal.

Abstract translation: 电光装置包括光解除复用部分，其操作以输出具有第一波长的第一光信号和具有第二波长的第二光信号，光电检测器阵列和通信地连接到光电检测器阵列的开关逻辑部分 所述开关逻辑部分用于确定所述光电检测器阵列的哪个光电检测器将所述第一光信号转换为第一电信号，并从与所述第一光信号相关联的第一输出节点输出所述第一电信号。

公开(公告)号：US20140027826A1

公开(公告)日：2014-01-30

申请号：US13561177

申请日：2012-07-30

Applicant: Solomon Assefa ,  Jeffrey P. Gambino ,  Steven M. Shank

Inventor： Solomon Assefa ,  Jeffrey P. Gambino ,  Steven M. Shank

IPC: H01L27/14 ,  G06F17/50 ,  H01L31/18

CPC classification number: H01L27/146 ,  H01L27/1443 ,  H01L31/022408 ,  H01L31/103 ,  H01L31/1808 ,  H01L35/34 ,  H01L51/50 ,  Y02E10/50

Abstract: A method of forming an integrated photonic semiconductor structure having a photodetector device and a CMOS device may include depositing a dielectric stack over the photodetector device such that the dielectric stack encapsulates the photodetector. An opening is etched into the dielectric stack down to an upper surface of a region of an active area of the photodetector. A first metal layer is deposited directly onto the upper surface of the region of the active area via the opening such that the first metal layer may cover the region of the active area. Within the same mask level, a plurality of contacts including a second metal layer are located on the first metal layer and on the CMOS device. The first metal layer isolates the active area from the occurrence of metal intermixing between the second metal layer and the active area of the photodetector.

Abstract translation: 形成具有光电检测器件和CMOS器件的集成光子半导体结构的方法可以包括在光电检测器器件上沉积电介质堆叠，使得电介质堆叠封装光电检测器。 电介质堆叠中的开口蚀刻到光电检测器的有源区域的区域的上表面。 第一金属层经由开口直接沉积在有源区域的区域的上表面上，使得第一金属层可以覆盖有源区域的区域。 在相同的掩模级内，包括第二金属层的多个触点位于第一金属层上和CMOS器件上。 第一金属层将活性区域与第二金属层和光电检测器的有源区域之间的金属混合的发生隔离。

公开(公告)号：US20130330036A1

公开(公告)日：2013-12-12

申请号：US13490043

申请日：2012-06-06

Applicant: Solomon Assefa ,  Huapu Pan ,  Yurii Vlasov

Inventor： Solomon Assefa ,  Huapu Pan ,  Yurii Vlasov

IPC: G02B6/26

CPC classification number: G02B6/12002 ,  G02B6/14 ,  G02B2006/12123 ,  G02B2006/1215 ,  G02B2006/12195 ,  H01L31/02327

Abstract: A method of exciting a selected light propagation mode in a device is disclosed. At least two light beams are propagated proximate a waveguide of the device substantially parallel to a selected surface of the waveguide. Light is transferred from the at least two beams of light into the waveguide through the selected surface to excite the selected light propagation mode in the waveguide.

Abstract translation: 公开了一种在设备中激发所选择的光传播模式的方法。 至少两个光束在基本上平行于波导的选定表面的装置的波导附近传播。 光从至少两束光束通过所选择的表面传输到波导中，以激发波导中所选择的光传播模式。

公开(公告)号：US08535953B2

公开(公告)日：2013-09-17

申请号：US13350174

申请日：2012-01-13

Applicant: David W. Abraham ,  Solomon Assefa ,  Eugene J. O'Sullivan

Inventor： David W. Abraham ,  Solomon Assefa ,  Eugene J. O'Sullivan

IPC: H01L21/00 ,  H01L21/20 ,  H01L21/461 ,  H01L21/302

CPC classification number: H01L43/12

Abstract: Processes for selectively patterning a magnetic film structure generally include selectively etching an exposed portion of a freelayer disposed on a tunnel barrier layer by a wet process, which includes exposing the freelayer to an etchant solution comprising at least one acid and an organophosphorus acid inhibitor or salt thereof, stopping on the tunnel barrier layer.

Abstract translation: 用于选择性地图案化磁性膜结构的方法通常包括通过湿法选择性地蚀刻设置在隧道势垒层上的自由层的暴露部分，其包括将自由层暴露于包含至少一种酸和有机磷酸抑制剂或盐的蚀刻剂溶液 在隧道势垒层上停止。

公开(公告)号：US08455292B2

公开(公告)日：2013-06-04

申请号：US13229440

申请日：2011-09-09

Applicant: Solomon Assefa ,  Pratik P. Joshi ,  Deborah A. Neumayer

Inventor： Solomon Assefa ,  Pratik P. Joshi ,  Deborah A. Neumayer

IPC: H01L21/00

CPC classification number: H01L31/105 ,  C23C16/28 ,  G02B6/12004 ,  G02B6/131 ,  H01L21/02532 ,  H01L21/0262 ,  H01L31/1808 ,  Y02E10/50

Abstract: A method for forming a photodetector device includes forming waveguide feature on a substrate, and forming a photodetector feature including a germanium (Ge) film, the Ge film deposited on the waveguide feature using a plasma enhanced chemical vapor deposition (PECVD) process, the PECVD process having a deposition temperature from about 500° C. to about 550° C., and a deposition pressure from about 666.612 Pa to about 1066.579 Pa.

Abstract translation: 一种形成光电检测器件的方法包括在基片上形成波导特征，并使用等离子体增强化学气相沉积（PECVD）工艺形成包括锗（Ge）膜，沉积在波导特征上的Ge膜的光电检测器特征，PECVD 沉积温度为约500℃至约550℃，沉积压力为约666.612Pa至约1066.579Pa。

公开(公告)号：US20130065349A1

公开(公告)日：2013-03-14

申请号：US13229440

申请日：2011-09-09

Applicant: Solomon Assefa ,  Pratik P. Joshi ,  Deborah A. Neumayer

Inventor： Solomon Assefa ,  Pratik P. Joshi ,  Deborah A. Neumayer

IPC: H01L31/18 ,  H01L21/205

CPC classification number: H01L31/105 ,  C23C16/28 ,  G02B6/12004 ,  G02B6/131 ,  H01L21/02532 ,  H01L21/0262 ,  H01L31/1808 ,  Y02E10/50

Abstract: A method for forming a photodetector device includes forming waveguide feature on a substrate, and forming a photodetector feature including a germanium (Ge) film, the Ge film deposited on the waveguide feature using a plasma enhanced chemical vapor deposition (PECVD) process, the PECVD process having a deposition temperature from about 500° C. to about 550° C., and a deposition pressure from about 666.612 Pa to about 1066.579 Pa.

Abstract translation: 一种形成光电检测器件的方法包括在基片上形成波导特征，并使用等离子体增强化学气相沉积（PECVD）工艺形成包括锗（Ge）膜，沉积在波导特征上的Ge膜的光电检测器特征，PECVD 沉积温度为约500℃至约550℃，沉积压力为约666.612Pa至约1066.579Pa。