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公开(公告)号：US20050096545A1
公开(公告)日：2005-05-05
申请号：US10697518
申请日：2003-10-30
Applicant: Bruno Haider , Robert Wodnicki
Inventor： Bruno Haider , Robert Wodnicki
CPC classification number: G01S15/8925 , G01S7/5202 , G01S7/52079 , G01S7/5208 , G01S15/8918 , G10K11/341
Abstract: A probe having a plurality of transducers also has a plurality of pulsers within the probe that are responsive to one or more transmit timing signals received from an external system to transmit pulses to the plurality of transducers. The external system may be, but need not be, an imaging system, and the transducers may be, but need not be, ultrasound transducers.
Abstract translation: 具有多个换能器的探头还具有探针内的多个脉冲发生器，其响应于从外部系统接收的一个或多个发射定时信号，以向多个换能器发送脉冲。 外部系统可以是但不必是成像系统，并且换能器可以是但不必是超声换能器。
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公开(公告)号：US20050094490A1
公开(公告)日：2005-05-05
申请号：US10977930
申请日：2004-10-29
Applicant: Kai Thomenius , Rayette Fisher , Robert Wodnicki , William Burdick
Inventor： Kai Thomenius , Rayette Fisher , Robert Wodnicki , William Burdick
CPC classification number: B06B1/0292 , G01N29/06 , G01N29/262 , G01N2291/106 , H01L2924/0002 , H01L2924/00
Abstract: An integrated switch matrix for reconfiguring subelements of a mosaic sensor array to form elements. The configuration of the switch matrix is fully programmable. The switch matrix includes access switches that connect subelements to bus lines and matrix switches that connect subelements to subelements. Each subelement has a unit switch cell comprising at least one access switch, at least one matrix switch, a respective memory element for storing the future state of each switch, and a respective control circuit for each switch. The access and matrix switches are of a type having the ability to memorize control data representing the current switch state of the switch, which control data includes a data bit input to turn-on/off circuits incorporated in the control circuit. The sensor array and the switching matrix may be built in different strata of a co-integrated structure or they may be built on separate wafers that are electrically connected. If the sensors are arranged on a hexagonal grid, the unit switch cells may be arranged on either a hexagonal or rectangular grid.
Abstract translation: 一种用于重新配置马赛克传感器阵列的子元素以形成元素的集成开关矩阵。 开关矩阵的配置是完全可编程的。 开关矩阵包括将子元件连接到总线线路的接入开关和将子元件连接到子元件的矩阵开关。 每个子元件具有包括至少一个存取开关，至少一个矩阵开关，用于存储每个开关的未来状态的相应存储元件以及每个开关的相应控制电路的单元开关单元。 存取和矩阵开关是具有存储表示开关的当前开关状态的控制数据的能力的类型，该控制数据包括输入到控制电路中的导通/截止电路的数据位。 传感器阵列和开关矩阵可以内置在共同一体化结构的不同层中，或者它们可以被构建在电连接的分开的晶片上。 如果传感器布置在六边形网格上，则单元开关单元可以布置在六边形或矩形网格上。
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公开(公告)号：US20080183078A1
公开(公告)日：2008-07-31
申请号：US11669235
申请日：2007-01-31
Applicant: Bruno Hans Haider , Kjell Kristoffersen , Rayette Ann Fisher , Thomas Halvorsrod , Robert Wodnicki
Inventor： Bruno Hans Haider , Kjell Kristoffersen , Rayette Ann Fisher , Thomas Halvorsrod , Robert Wodnicki
IPC: A61B8/00
CPC classification number: A61B8/00 , A61B1/0005 , B06B1/0622 , G01S7/5208 , G01S15/8925 , G01S15/8927 , G03B42/06
Abstract: An ultrasound imaging system (100). An exemplary system (100) includes a plurality of transducer elements (136) formed in subarrays (140) and a plurality of subarray circuit units (160′), with each circuit unit (160′) connected to a subarray (140) of the transducer elements (136). The circuitry in each unit (160′) comprises a plurality of integrated circuits (330, 340, 350), with at least a first (340) of the integrated circuits formed over a second (330) of the integrated circuits in a stacked configuration. In an example illustration the first integrated circuit (340) includes a first plurality of first bond pads (345) along a surface (342) thereof and the second integrated circuit (330) includes a second plurality of second bond pads (335) along a surface (331) thereof, with bond wires (344) extending between pairs of first and second bond pads to provide input/output signal connections therebetween.
Abstract translation: 超声成像系统（100）。 示例性系统（100）包括形成在子阵列（140）中的多个换能器元件（136）和多个子阵列电路单元（160'），每个电路单元（160'）连接到子阵列 换能器元件（136）。 每个单元（160'）中的电路包括多个集成电路（330,340,350），其中至少第一（340）个集成电路以堆叠配置形成在第二（330）集成电路上 。 在示例图中，第一集成电路（340）包括沿着其表面（342）的第一多个第一接合焊盘（345），并且第二集成电路（330）包括沿着第一多个第二接合焊盘 其具有在成对的第一和第二接合焊盘之间延伸的接合线（344），以在它们之间提供输入/输出信号连接。
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4.发明申请Capacitive micromachined ultrasound transducer and methods of making the same 审中-公开电容式微机械超声换能器及其制作方法公开(公告)号：US20070180916A1
公开(公告)日：2007-08-09
申请号：US11350424
申请日：2006-02-09
Applicant: Wei-Cheng Tian , Lowell Smith , Ching-Yeu Wei , Robert Wodnicki , Rayette Fisher , David Mills , Stanley Chu , Hyon-Jin Kwon
Inventor： Wei-Cheng Tian , Lowell Smith , Ching-Yeu Wei , Robert Wodnicki , Rayette Fisher , David Mills , Stanley Chu , Hyon-Jin Kwon
CPC classification number: B06B1/0292 , A61B2562/028 , Y10T29/49005
Abstract: A method of making a capacitive micromachined ultrasound transducer cell is provided. The method includes providing a carrier substrate, where the carrier substrate comprises glass. The step of providing the glass substrate may include forming vias in the glass substrate. Further, the method includes providing a membrane such that at least one of the carrier substrate, or the membrane comprises support posts, where the support posts are configured to define a cavity depth. The method further includes bonding the membrane to the carrier substrate by using the support posts, where the carrier substrate, the membrane and the support posts define an acoustic cavity.
Abstract translation: 提供了一种制造电容式微加工超声换能器的方法。 该方法包括提供载体衬底，其中载体衬底包括玻璃。 提供玻璃基板的步骤可以包括在玻璃基板中形成通路。 此外，该方法包括提供膜，使得载体基底或膜中的至少一个包括支撑柱，其中支撑柱构造成限定腔深度。 该方法还包括通过使用支撑柱将膜结合到载体基底，其中载体基底，膜和支撑柱限定声腔。
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5.发明申请公开(公告)号：US20050148132A1
公开(公告)日：2005-07-07
申请号：US10751290
申请日：2004-01-01
Applicant: Robert Wodnicki
Inventor： Robert Wodnicki
CPC classification number: B06B1/0292 , Y10T29/42
Abstract: An integrated circuit is fabricated by micromachining a hexagonal array of cMUT elements on top of a substrate comprising a hexagonal array of CMOS cells. Each cMUT element overlies a respective CMOS cell in one-to-one correspondence. During layout of the mask for micromachining the cMUT layer, either the hexagonal pattern or the alignment key is rotated until an axis of symmetry of the hexagonal pattern is aligned with an axis of the alignment key. Later, when the mask is superimposed on the CMOS substrate, the alignment key on the mask is aligned with an alignment key on the substrate. This ensures that the cMUT elements formed by optical lithography will be matched to the CMOS cells.
Abstract translation: 通过在包括六边形阵列的CMOS单元的衬底的顶部上微加工cMUT元件的六边形阵列来制造集成电路。 每个cMUT元件一一对应地覆盖相应的CMOS单元。 在用于微加工cMUT层的掩模的布局期间，旋转六边形图案或对准键直到六边形图案的对称轴线与对准键的轴线对准。 之后，当掩模叠加在CMOS基板上时，掩模上的对准键与衬底上的对准键对齐。 这确保了通过光学光刻形成的cMUT元件将与CMOS单元匹配。
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Patent Agency Ranking
公开(公告)号：US07687976B2
公开(公告)日：2010-03-30
申请号：US11669235
申请日：2007-01-31
Applicant: Bruno Hans Haider , Kjell Kristoffersen , Rayette Ann Fisher , Thomas Halvorsrod , Robert Wodnicki
Inventor： Bruno Hans Haider , Kjell Kristoffersen , Rayette Ann Fisher , Thomas Halvorsrod , Robert Wodnicki
CPC classification number: A61B8/00 , A61B1/0005 , B06B1/0622 , G01S7/5208 , G01S15/8925 , G01S15/8927 , G03B42/06
Abstract: An ultrasound imaging system (100). An exemplary system (100) includes a plurality of transducer elements (136) formed in subarrays (140) and a plurality of subarray circuit units (160′), with each circuit unit (160′) connected to a subarray (140) of the transducer elements (136). The circuitry in each unit (160′) comprises a plurality of integrated circuits (330, 340, 350), with at least a first (340) of the integrated circuits formed over a second (330) of the integrated circuits in a stacked configuration. In an example illustration the first integrated circuit (340) includes a first plurality of first bond pads (345) along a surface (342) thereof and the second integrated circuit (330) includes a second plurality of second bond pads (335) along a surface (331) thereof, with bond wires (344) extending between pairs of first and second bond pads to provide input/output signal connections therebetween.
Abstract translation: 超声成像系统（100）。 示例性系统（100）包括形成在子阵列（140）中的多个换能器元件（136）和多个子阵列电路单元（160'），每个电路单元（160'）连接到子阵列 换能器元件（136）。 每个单元（160'）中的电路包括多个集成电路（330,340,350），其中至少第一（340）个集成电路以堆叠配置形成在第二（330）集成电路上 。 在示例图中，第一集成电路（340）包括沿着其表面（342）的第一多个第一接合焊盘（345），并且第二集成电路（330）包括沿着第一多个第二接合焊盘 其具有在成对的第一和第二接合焊盘之间延伸的接合线（344），以在它们之间提供输入/输出信号连接。
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7.发明申请Transmit and receive interface array for highly integrated ultrasound scanner 有权发射和接收接口阵列，用于高度集成的超声波扫描仪公开(公告)号：US20070016026A1
公开(公告)日：2007-01-18
申请号：US11172599
申请日：2005-06-29
Applicant: Kai Thomenius , Robert Wodnicki , Ye-Ming Li
Inventor： Kai Thomenius , Robert Wodnicki , Ye-Ming Li
IPC: A61B8/00
CPC classification number: G10K11/341 , A61B8/56 , G01S7/5208
Abstract: An ultrasonic transducer probe having a highly integrated interface circuit array. Low-voltage transmit control signals from the system are transmitted on the system transmit channels via the ultrasound probe cable and into the interface circuit array. These transmit control signals are routed through the interface circuit array using a dense switching matrix. Once the low-voltage transmit control signals reach individual cells within the interface array, they are decoded and used to control local high-voltage pulser circuits to drive individual ultrasound transducer elements made up of selected subelements that are co-integrated with the interface electronics. The interface cell circuitry further comprises a high-voltage transmit/receive switch, which is closed when the high-voltage pulser is transmitting to protect the low-voltage components.
Abstract translation: 具有高度集成的接口电路阵列的超声换能器探针。 来自系统的低电压发射控制信号通过超声探头电缆在系统发射通道上传输到接口电路阵列中。 这些发送控制信号使用密集的交换矩阵通过接口电路阵列路由。 一旦低压发射控制信号到达接口阵列内的单个小区，就将它们解码并用于控制本地高压脉冲发生器电路，以驱动由与接口电子器件共同集成的选定子元件组成的各个超声换能器元件。 接口单元电路还包括高压发射/接收开关，当高压脉冲发生器正在传输时，该高压发射/接收开关闭合以保护低电压部件。
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公开(公告)号：US20050237858A1
公开(公告)日：2005-10-27
申请号：US11018238
申请日：2004-12-21
Applicant: Kai Thomenius , Rayette Fisher , Robert Wodnicki , Christopher Hazard , Lowell Smith , Bruno Haider , Kenneth Rigby
Inventor： Kai Thomenius , Rayette Fisher , Robert Wodnicki , Christopher Hazard , Lowell Smith , Bruno Haider , Kenneth Rigby
CPC classification number: B06B1/0292 , A61B2562/028 , G01N29/0609 , G01N29/069 , G01N29/245 , G01N2291/0423 , G01N2291/106
Abstract: A reconfigurable linear array of sensors (e.g., optical, thermal, pressure, ultrasonic). The reconfigurability allows the size and spacing of the sensor elements to be a function of the distance from the beam center. This feature improves performance for imaging systems having a limited channel count. The improved performance, for applications in which multiple transmit focal zones are employed, arises from the ability to adjust the aperture for a particular depth.
Abstract translation: 传感器的可重构线性阵列（例如光学，热学，压力，超声波）。 可重新配置允许传感器元件的尺寸和间距是与梁中心距离的函数。 该功能提高了具有有限通道数的成像系统的性能。 对于使用多个透射聚焦区域的应用而言，改进的性能来自于为特定深度调整孔径的能力。
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9.发明申请公开(公告)号：US20050146371A1
公开(公告)日：2005-07-07
申请号：US10988024
申请日：2004-11-12
Applicant: Robert Wodnicki
Inventor： Robert Wodnicki
IPC: A61B8/00 , H03K17/10 , H03K17/687 , H03K5/153 , G05F3/20 , H03K17/735
CPC classification number: H03K17/102 , H03K17/6874
Abstract: An integrated high-voltage switching circuit includes a switch having ON and OFF states and having a parasitic gate capacitance. The switch consists of a pair of DMOS transistors integrated back to back and having a shared gate terminal, the drains of the DMOS transistors being connected to the input and output terminals of the switch respectively. The switching circuit further includes a turn-on circuit comprising a PMOS transistor having its drain connected to the shared gate terminal of the switch via a first diode, having its source connected to a global switch gate bias voltage terminal from which the PMOS transistor draws current, and having its gate electrically coupled to a switch gate control terminal that receives a switch gate control voltage input. The switch transitions from the OFF state to the ON state in response to a first transition of the switch gate control voltage input that causes the PMOS transistor to turn on, and the switch remains in the ON state in response to a second transition of the switch gate control voltage input that causes the PMOS transistor to turn off. The DMOS transistors turn on in response to the shared gate being coupled to the switch gate bias voltage when the PMOS transistor turns on.
Abstract translation: 集成的高压开关电路包括具有ON和OFF状态并具有寄生栅极电容的开关。 开关由一对背对背集成的DMOS晶体管组成，具有共用栅极端子，DMOS晶体管的漏极分别连接到开关的输入和输出端子。 开关电路还包括导通电路，其包括PMOS晶体管，其PMOS的漏极经由第一二极管连接到开关的共享栅极端子，其源极连接到全局开关栅极偏置电压端子，PMOS晶体管从该栅极偏置电压端子吸取电流 并且其栅极电耦合到接收开关栅极控制电压输入的开关栅极控制端子。 响应于导致PMOS晶体管导通的开关栅极控制电压输入的第一跃迁，开关从OFF状态转变到ON状态，并且开关响应于开关的第二过渡而保持在ON状态 栅极控制电压输入使PMOS晶体管关断。 当PMOS晶体管导通时，DMOS晶体管响应于共享栅极耦合到开关栅极偏置电压而导通。
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公开(公告)号：US20100174195A1
公开(公告)日：2010-07-08
申请号：US12725536
申请日：2010-03-17
Applicant: Bruno Hans Haider , Kjell Kristoffersen , Rayette Ann Fisher , Thomas Halvorsrod , Robert Wodnicki
Inventor： Bruno Hans Haider , Kjell Kristoffersen , Rayette Ann Fisher , Thomas Halvorsrod , Robert Wodnicki
IPC: A61B8/14
CPC classification number: A61B8/00 , A61B1/0005 , B06B1/0622 , G01S7/5208 , G01S15/8925 , G01S15/8927 , G03B42/06
Abstract: An ultrasound imaging system (100). An exemplary system (100) includes a plurality of transducer elements (136) formed in subarrays (140) and a plurality of subarray circuit units (160′), with each circuit unit (160′) connected to a subarray (140) of the transducer elements (136). The circuitry in each unit (160′) comprises a plurality of integrated circuits (330, 340, 350), with at least a first (340) of the integrated circuits formed over a second (330) of the integrated circuits in a stacked configuration. In an example illustration the first integrated circuit (340) includes a first plurality of first bond pads (345) along a surface (342) thereof and the second integrated circuit (330) includes a second plurality of second bond pads (335) along a surface (331) thereof, with bond wires (344) extending between pairs of first and second bond pads to provide input/output signal connections therebetween.
Abstract translation: 超声成像系统（100）。 示例性系统（100）包括形成在子阵列（140）中的多个换能器元件（136）和多个子阵列电路单元（160'），每个电路单元（160'）连接到子阵列 换能器元件（136）。 每个单元（160'）中的电路包括多个集成电路（330,340,350），其中至少第一（340）个集成电路以堆叠配置形成在第二（330）集成电路上 。 在示例图中，第一集成电路（340）包括沿着其表面（342）的第一多个第一接合焊盘（345），并且第二集成电路（330）包括沿着第一多个第二接合焊盘 其具有在成对的第一和第二接合焊盘之间延伸的接合线（344），以在它们之间提供输入/输出信号连接。
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