Nitride-based transistors having laterally grown active region and methods of fabricating same
    1.
    发明授权
    Nitride-based transistors having laterally grown active region and methods of fabricating same 有权
    具有横向增长的有源区的氮化物基晶体管及其制造方法

    公开(公告)号:US08946777B2

    公开(公告)日:2015-02-03

    申请号:US12564473

    申请日:2009-09-22

    摘要: High electron mobility transistors and/or methods of fabricating high electron mobility transistors that include a first Group III-nitride layer having vertically grown regions, laterally grown regions and a coalescence region are provided. A Group III-nitride channel layer is provided on the first Group III-nitride layer and a Group III-nitride barrier layer is provided on the Group III-nitride channel layer. A drain contact, a source contact and a gate contact are provided on the barrier layer. The gate contact is disposed on a portion of the barrier layer on a laterally grown region of the first Group III-nitride layer and at least a portion of one of the source contact and/or the drain contact is disposed on a portion of the barrier layer on a vertically grown region of the first Group III-nitride layer.

    摘要翻译: 提供了高电子迁移率晶体管和/或制造高电子迁移率晶体管的方法,其包括具有垂直生长区域,横向生长区域和聚结区域的第一III族氮化物层。 III族氮化物沟道层设置在第一III族氮化物层上,III族氮化物阻挡层设置在III族氮化物沟道层上。 漏极接触,源极接触和栅极接触设置在阻挡层上。 栅极触点设置在第一III族氮化物层的横向生长区域上的阻挡层的一部分上,并且源极接触和/或漏极接触中的一个的至少一部分设置在屏障的一部分上 在第一III族氮化物层的垂直生长区上。

    Methods of fabricating transistors including dielectrically-supported gate electrodes and related devices
    5.
    发明授权
    Methods of fabricating transistors including dielectrically-supported gate electrodes and related devices 有权
    制造包括介电支撑栅电极和相关器件的晶体管的方法

    公开(公告)号:US08049252B2

    公开(公告)日:2011-11-01

    申请号:US12724656

    申请日:2010-03-16

    IPC分类号: H01L29/66

    摘要: Transistors are fabricated by forming a protective layer having a first opening extending therethrough on a substrate, forming a dielectric layer on the protective layer having a second opening extending therethrough that is wider than the first opening, and forming a gate electrode in the first and second openings. A first portion of the gate electrode laterally extends on surface portions of the protective layer outside the first opening, and a second portion of the gate electrode is spaced apart from the protective layer and laterally extends beyond the first portion on portions of the dielectric layer outside the second opening. Related devices and fabrication methods are also discussed.

    摘要翻译: 晶体管是通过在衬底上形成具有延伸穿过其中的第一开口的保护层制成的,在保护层上形成介电层,该电介质层具有延伸穿过其的第二开口,该第二开口比第一开口更宽,并且在第一和第二 开口 栅电极的第一部分横向延伸在第一开口外部的保护层的表面部分上,并且栅电极的第二部分与保护层间隔开,并且横向延伸超过介电层外部的第一部分 第二个开幕。 还讨论了相关设备和制造方法。

    Nitride-Based Transistors With a Protective Layer and a Low-Damage Recess
    6.
    发明申请
    Nitride-Based Transistors With a Protective Layer and a Low-Damage Recess 审中-公开
    具有保护层和低损耗凹槽的氮化物基晶体管

    公开(公告)号:US20110140123A1

    公开(公告)日:2011-06-16

    申请号:US13022182

    申请日:2011-02-07

    IPC分类号: H01L29/778 H01L29/20

    摘要: Transistors are fabricated by forming a nitride-based semiconductor barrier layer on a nitride-based semiconductor channel layer and forming a protective layer on a gate region of the nitride-based semiconductor barrier layer. Patterned ohmic contact metal regions are formed on the barrier layer and annealed to provide first and second ohmic contacts. The annealing is carried out with the protective layer on the gate region. A gate contact is also formed on the gate region of the barrier layer. Transistors having protective layer in the gate region are also provided as are transistors having a barrier layer with a sheet resistance substantially the same as an as-grown sheet resistance of the barrier layer.

    摘要翻译: 晶体管通过在氮化物基半导体沟道层上形成氮化物基半导体势垒层并在氮化物基半导体势垒层的栅极区上形成保护层来制造晶体管。 图案化的欧姆接触金属区形成在阻挡层上并退火以提供第一和第二欧姆接触。 退火是在栅极区域上的保护层进行的。 栅极接触也形成在阻挡层的栅极区上。 还提供了在栅极区域中具有保护层的晶体管,就像具有阻挡层的晶体管一样,薄膜电阻基本上与阻挡层的片状电阻基本相同。

    Methods of Fabricating Transistors Having Buried N-Type and P-Type Regions Beneath the Source Region
    8.
    发明申请
    Methods of Fabricating Transistors Having Buried N-Type and P-Type Regions Beneath the Source Region 有权
    制造在源区下方的N型和P型区域的晶体管的制造方法

    公开(公告)号:US20090042345A1

    公开(公告)日:2009-02-12

    申请号:US12253387

    申请日:2008-10-17

    IPC分类号: H01L21/335 H01L21/31

    摘要: High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.

    摘要翻译: 提供了高电子迁移率晶体管,其包括与盖层的表面相邻的具有高铝浓度的不均匀的铝浓度的AlGaN基覆盖层,其远离设置有盖层的阻挡层。 提供了高电子迁移率晶体管,其包括具有邻近盖层的表面的掺杂区域的帽层,其远离其上设置盖层的阻挡层。 提供了宽带隙半导体器件的石墨BN钝化结构。 提供了III族氮化物半导体器件的SiC钝化结构。 还提供了钝化结构的氧气退火。 还提供了没有凹槽的欧姆接触。

    Transistors having buried n-type and p-type regions beneath the source region
    10.
    发明授权
    Transistors having buried n-type and p-type regions beneath the source region 有权
    晶体管在源极区域下方埋有n型和p型区域

    公开(公告)号:US07456443B2

    公开(公告)日:2008-11-25

    申请号:US10996249

    申请日:2004-11-23

    IPC分类号: H01L21/00 H01L29/74

    摘要: High electron mobility transistors are provided that include a non-uniform aluminum concentration AlGaN based cap layer having a high aluminum concentration adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. High electron mobility transistors are provided that include a cap layer having a doped region adjacent a surface of the cap layer that is remote from the barrier layer on which the cap layer is provided. Graphitic BN passivation structures for wide bandgap semiconductor devices are provided. SiC passivation structures for Group III-nitride semiconductor devices are provided. Oxygen anneals of passivation structures are also provided. Ohmic contacts without a recess are also provided.

    摘要翻译: 提供了高电子迁移率晶体管,其包括与盖层的表面相邻的具有高铝浓度的不均匀的铝浓度的AlGaN基覆盖层,其远离设置有盖层的阻挡层。 提供了高电子迁移率晶体管,其包括具有邻近盖层的表面的掺杂区域的帽层,其远离其上设置盖层的阻挡层。 提供了宽带隙半导体器件的石墨BN钝化结构。 提供了III族氮化物半导体器件的SiC钝化结构。 还提供了钝化结构的氧气退火。 还提供了没有凹槽的欧姆接触。