公开(公告)号：US20100108254A1

公开(公告)日：2010-05-06

申请号：US12458073

申请日：2009-06-30

Applicant: Michael A. Huff ,  Paul Sunal

Inventor： Michael A. Huff ,  Paul Sunal

IPC: B32B37/00 ,  C23C16/00 ,  C22C1/00 ,  B32B38/00 ,  B23H9/00 ,  B22D25/00

CPC classification number: C22C1/00 ,  C22C1/045 ,  H01L23/3736 ,  H01L23/473 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/3025 ,  H01S5/02423 ,  H01S5/02476 ,  H01S5/4025 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The present invention relates generally to a metallic alloy composed of Titanium and Tungsten that together form an alloy having a Coefficient of Thermal Expansion (CTE), wherein the content of the respective constituents can be adjusted so that the alloy material can be nearly perfectly matched to that of a commonly used semiconductor and ceramic materials. Moreover, alloys of Titanium-Tungsten have excellent electrical and thermal conductivities making them ideal material choices for many electrical, photonic, thermoelectric, MMIC, NEMS, nanotechnology, power electronics, MEMS, and packaging applications. The present invention describes a method for designing the TiW alloy so as to nearly perfectly match the coefficient of thermal expansion of a large number of different types of commonly used semiconductor and ceramic materials. The present invention also describes a number of useful configurations wherein the TiW material is made as well as how it can be shaped, formed and polished into heat sink, heat spreaders, and electrodes for many applications. The present invention also discloses the direct bonding of a TiW substrate to a semiconductor substrate.

Abstract translation: 本发明一般涉及由钛和钨组成的金属合金，它们共同形成具有热膨胀系数（CTE）的合金，其中可以调节各组分的含量，使得合金材料可以几乎完全匹配 一种常用的半导体和陶瓷材料。 此外，钛钨合金具有优异的导电性和导热性，使其成为许多电子，光子，热电，MMIC，NEMS，纳米技术，电力电子，MEMS和封装应用的理想材料选择。 本发明描述了一种用于设计TiW合金的方法，几乎​​完全匹配大量不同类型的常用半导体和陶瓷材料的热膨胀系数。 本发明还描述了许多有用的构造，其中制造TiW材料以及如何将其形成，形成和抛光成散热器，散热器和用于许多应用的电极。 本发明还公开了将TiW衬底直接接合到半导体衬底上。

公开(公告)号：US20120301981A1

公开(公告)日：2012-11-29

申请号：US13113378

申请日：2011-05-23

Applicant: Mehmet OZGUR ,  Paul SUNAL ,  Lance OH ,  Michael HUFF ,  Michael PEDERSEN

Inventor： Mehmet OZGUR ,  Paul SUNAL ,  Lance OH ,  Michael HUFF ,  Michael PEDERSEN

IPC: H01L21/62 ,  B82Y40/00

CPC classification number: H01J1/304 ,  B82Y10/00 ,  B82Y40/00 ,  H01J9/025 ,  H01J2201/30469

Abstract: The present invention is directed to a method for the fabrication of electron field emitter devices, including carbon nanotube (CNT) field emission devices. The method of the present invention involves depositing one or more electrically conductive thin-film layers onto a electrically conductive substrate and performing lithography and etching on these thin film layers to pattern them into the desired shapes. The top-most layer may be of a material type that acts as a catalyst for the growth of single- or multiple-walled carbon nanotubes (CNTs). Subsequently, the substrate is etched to form a high-aspect ratio post or pillar structure onto which the previously patterned thin film layers are positioned. Carbon nanotubes may be grown on the catalyst material layer. The present invention also described methods by which the individual field emission devices may be singulated into individual die from a substrate.

Abstract translation: 本发明涉及制造包括碳纳米管（CNT）场发射器件的电子场发射器件的方法。 本发明的方法包括将一个或多个导电薄膜层沉积到导电衬底上，并在这些薄膜层上进行光刻和蚀刻以将它们图案化成所需的形状。 最顶层可以是用作单壁或多壁碳纳米管（CNT）生长的催化剂的材料类型。 随后，对衬底进行蚀刻，以形成先前构图的薄膜层所定位的高纵横比柱或柱结构。 碳纳米管可以在催化剂材料层上生长。 本发明还描述了可以将各个场致发射器件从衬底分离成单个管芯的方法。

公开(公告)号：US09852870B2

公开(公告)日：2017-12-26

申请号：US13113378

申请日：2011-05-23

Applicant: Mehmet Ozgur ,  Paul Sunal ,  Lance Oh ,  Michael Huff ,  Michael Pedersen

Inventor： Mehmet Ozgur ,  Paul Sunal ,  Lance Oh ,  Michael Huff ,  Michael Pedersen

IPC: H01L21/00 ,  H01J1/02 ,  H01J1/304 ,  H01J9/02 ,  B82Y40/00 ,  B82Y10/00

CPC classification number: H01J1/304 ,  B82Y10/00 ,  B82Y40/00 ,  H01J9/025 ,  H01J2201/30469

Abstract: The present invention is directed to a method for the fabrication of electron field emitter devices, including carbon nanotube (CNT) field emission devices. The method of the present invention involves depositing one or more electrically conductive thin-film layers onto a electrically conductive substrate and performing lithography and etching on these thin film layers to pattern them into the desired shapes. The top-most layer may be of a material type that acts as a catalyst for the growth of single- or multiple-walled carbon nanotubes (CNTs). Subsequently, the substrate is etched to form a high-aspect ratio post or pillar structure onto which the previously patterned thin film layers are positioned. Carbon nanotubes may be grown on the catalyst material layer. The present invention also described methods by which the individual field emission devices may be singulated into individual die from a substrate.

公开(公告)号：US09053929B1

公开(公告)日：2015-06-09

申请号：US13111473

申请日：2011-05-19

Applicant: Michael A. Huff ,  Paul Sunal

Inventor： Michael A. Huff ,  Paul Sunal

IPC: H01L21/00 ,  H01L21/02 ,  H01L21/66

CPC classification number: H01L21/02356 ,  B81B2207/015 ,  B81C1/00666 ,  C23C14/22 ,  C23C14/3442 ,  C23C14/345 ,  C23C14/54 ,  H01L21/02274 ,  H01L21/2855 ,  H01L22/12

Abstract: A method and system are disclosed for controlling the state of stress in deposited thin films on microelectronics wafers for the integration of MEMS and NEMS devices with microelectronics. According to the method and system, various process parameters including: process pressure; substrate temperature; deposition rate; and ion-beam energies (controlled via the ion beam current, voltage, signal frequency and duty cycle) are varied using a step-by-step methodology to arrive at a pre-determined desired state of stress in thin films deposited using PVD at low temperatures and desired stress states onto wafers or substrates having microelectronics processing performed on them.

Abstract translation: 公开了一种用于控制微电子晶片上沉积的薄膜中的应力状态以便将MEMS和NEMS器件与微电子集成的方法和系统。 根据方法和系统，各种工艺参数包括：工艺压力; 基板温度; 沉积速率; 和离子束能量（通过离子束电流，电压，信号频率和占空比控制）使用逐步方法来改变，以便在低温下使用PVD沉积的薄膜中获得预定的期望的应力状态 温度和期望的应力状态在其上执行微电子处理的晶片或基板上。

公开(公告)号：US08852378B2

公开(公告)日：2014-10-07

申请号：US12458073

申请日：2009-06-30

Applicant: Michael A. Huff ,  Paul Sunal

Inventor： Michael A. Huff ,  Paul Sunal

IPC: C22C1/00 ,  H01L23/373 ,  C22C1/04 ,  H01L23/473 ,  H01S5/024 ,  H01S5/40

CPC classification number: C22C1/00 ,  C22C1/045 ,  H01L23/3736 ,  H01L23/473 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/3025 ,  H01S5/02423 ,  H01S5/02476 ,  H01S5/4025 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The present invention relates generally to a metallic alloy composed of Titanium and Tungsten that together form an alloy having a Coefficient of Thermal Expansion (CTE), wherein the content of the respective constituents can be adjusted so that the alloy material can be nearly perfectly matched to that of a commonly used semiconductor and ceramic materials. Moreover, alloys of Titanium-Tungsten have excellent electrical and thermal conductivities making them ideal material choices for many electrical, photonic, thermoelectric, MMIC, NEMS, nanotechnology, power electronics, MEMS, and packaging applications. The present invention describes a method for designing the TiW alloy so as to nearly perfectly match the coefficient of thermal expansion of a large number of different types of commonly used semiconductor and ceramic materials. The present invention also describes a number of useful configurations wherein the TiW material is made as well as how it can be shaped, formed and polished into heat sink, heat spreaders, and electrodes for many applications. The present invention also discloses the direct bonding of a TiW substrate to a semiconductor substrate.

Abstract translation: 本发明一般涉及由钛和钨组成的金属合金，其一起形成具有热膨胀系数（CTE）的合金，其中可以调节各组分的含量，使得合金材料可以几乎完全匹配 一种常用的半导体和陶瓷材料。 此外，钛钨合金具有优异的导电性和导热性，使其成为许多电子，光子，热电，MMIC，NEMS，纳米技术，电力电子，MEMS和封装应用的理想材料选择。 本发明描述了一种用于设计TiW合金的方法，几乎​​完全匹配大量不同类型的常用半导体和陶瓷材料的热膨胀系数。 本发明还描述了许多有用的构造，其中制造TiW材料以及如何将其形成，形成和抛光成散热器，散热器和用于许多应用的电极。 本发明还公开了将TiW衬底直接接合到半导体衬底上。