公开(公告)号：US5343169A

公开(公告)日：1994-08-30

申请号：US37352

申请日：1993-03-25

申请人： Pascal Debaty

发明人： Pascal Debaty

IPC分类号： H03L7/06 ,  H03L7/089 ,  H03L7/099 ,  H03L7/00

CPC分类号： H03L7/0805 ,  H03L7/089 ,  H03L7/0991

摘要： A frequency locked loop includes a phase comparator receiving first and second periodic signals and having a first output providing pulses if the first signal is in phase advance with respect to the second signal and a second output providing pulses in the opposite case; an oscillator providing the second signal; a counter, the state of which determines the frequency of the oscillator, having an incrementation input and a decrementation input; and a sampling circuit for transmitting each Nth of the pulses either to the incrementation input if the pulse occurs at one of the first and second outputs of the comparator, or to the decrementation input if the pulse occurs at the other of the first and second outputs.

摘要翻译： 频率锁定环包括相位比较器，其接收第一和第二周期信号，并具有第一输出，如果第一信号相对于第二信号相位相位提前提供脉冲，并且第二输出在相反的情况下提供脉冲; 提供第二信号的振荡器; 计数器，其状态决定振荡器的频率，具有递增输入和递减输入; 以及采样电路，用于如果在比较器的第一和第二输出之一处发生脉冲，或者如果脉冲出现在第一和第二输出端的另一个处，则将第N个脉冲发送到增量输入 。

公开(公告)号：US20080303487A1

公开(公告)日：2008-12-11

申请号：US11570400

申请日：2004-08-23

申请人： Patrick Bernard ,  Pierre Daude ,  Pascal Debaty ,  Christian Perrin

发明人： Patrick Bernard ,  Pierre Daude ,  Pascal Debaty ,  Christian Perrin

IPC分类号： H02J7/06

CPC分类号： H02J7/041

摘要： In one embodiment, a circuit is formed to couple a battery to a charging voltage at least a portion of a time when the charging voltage is greater than zero volts and is less than a first voltage value. The circuit is also formed to decouple the battery from the charging voltage approximately when the charging voltage is greater than the first voltage and also approximately when the charging voltage is no greater than zero volts.

摘要翻译： 在一个实施例中，电路被形成为在充电电压大于零伏并且小于第一电压值的时间的至少一部分时间将电池耦合到充电电压。 电路还形成为当充电电压大于第一电压时大约在充电电压不大于零伏特时大约从充电电压中分离电池。

公开(公告)号：US06181197B2

公开(公告)日：2001-01-30

申请号：US09304384

申请日：1999-05-04

申请人： G{acute over (e)}rard Bret ,  Pascal Debaty

发明人： G{acute over (e)}rard Bret ,  Pascal Debaty

IPC分类号： H03K500

CPC分类号： H03H11/04

摘要： A bandpass filter includes a first and a second transconductor. The first transconductor has a first input connected to ground, and a second input connected to a second input of the second transconductor and to the output of the filter. An output of the first transconductor is connected to a first input of the second transconductor, and to an input of a filter through a first capactor. The output of the second transconductor is connected to ground through a second capacitor, and to a monitor amplifier. An output of the monitor amplifier is connected to the output of the filter. The bandpass filter further includes a third capacitor arranged between the second input and the output of the first transconductor, and a splitter bridge connected to the second input of the second transconductor.

摘要翻译： 带通滤波器包括第一和第二跨导体。 第一跨导体具有连接到地的第一输入端和连接到第二跨导体的第二输入端和滤波器的输出端的第二输入端。 第一跨导体的输出端连接到第二跨导体的第一输入端，并通过第一超大容器连接到滤波器的输入端。 第二跨导体的输出通过第二电容器连接到地，并连接到监视器放大器。 监视放大器的输出端连接到滤波器的输出端。 带通滤波器还包括布置在第一输入和第一跨导体的输出之间的第三电容器，以及连接到第二跨导体的第二输入端的分离桥。

公开(公告)号：US08179096B2

公开(公告)日：2012-05-15

申请号：US11570400

申请日：2004-08-23

申请人： Patrick Bernard ,  Pierre Daude ,  Pascal Debaty ,  Christian Perrin

发明人： Patrick Bernard ,  Pierre Daude ,  Pascal Debaty ,  Christian Perrin

IPC分类号： H01M10/44

CPC分类号： H02J7/041

摘要： In one embodiment, a circuit is formed to couple a battery to a charging voltage at least a portion of a time when the charging voltage is greater than zero volts and is less than a first voltage value. The circuit is also formed to decouple the battery from the charging voltage approximately when the charging voltage is greater than the first voltage and also approximately when the charging voltage is no greater than zero volts.

摘要翻译： 在一个实施例中，电路被形成为在充电电压大于零伏并且小于第一电压值的时间的至少一部分时间将电池耦合到充电电压。 电路还形成为当充电电压大于第一电压时大约在充电电压不大于零伏特时大约从充电电压中分离电池。

公开(公告)号：US06989694B2

公开(公告)日：2006-01-24

申请号：US09499060

申请日：2000-02-04

申请人： Christophe Garnier ,  Pascal Debaty

发明人： Christophe Garnier ,  Pascal Debaty

IPC分类号： G05F3/02

CPC分类号： H03K4/50

摘要： A voltage ramp generator includes a capacitance and a charging circuit that permits generation of a charging current for the capacitance. The charging circuit for the capacitance includes a current generator having a resistance Rg2. The charging circuit for the capacitance includes components, such as resistance Re, that enables the capacitance charging current to be proportional to (Re/Rg2)2. The voltage ramp generator is applicable to circuits for DC voltage converters operating in a current mode.

摘要翻译： 电压斜坡发生器包括电容和允许产生用于电容的充电电流的充电电路。 用于电容的充电电路包括具有电阻Rg2的电流发生器。用于电容的充电电路包括能够使电容充电电流与（Re / Rg 2）2成比例的诸如电阻Re的组件 。 电压斜坡发生器适用于在当前模式下工作的直流电压转换器的电路。

公开(公告)号：US06611173B2

公开(公告)日：2003-08-26

申请号：US10102402

申请日：2002-03-19

申请人： Pascal Debaty

发明人： Pascal Debaty

IPC分类号： H03F114

CPC分类号： H03F1/083

摘要： A circuit for splitting poles between a first stage and a second inverting voltage-amplifier stage of an electronic circuit, comprises, in series between the output of the first stage and the output of the second stage, and in that order, a first capacitor, a second capacitor and a resistor. The circuit further comprises a voltage-divider bridge which is connected between a terminal delivering a substantially constant voltage and the output of the first stage. The output of the voltage-divider bridge is linked to the common node between the first capacitor and the second capacitor, in such a way that a first resistor of the voltage-divider bridge is connected in parallel with the first capacitor.

公开(公告)号：US06556047B2

公开(公告)日：2003-04-29

申请号：US10100510

申请日：2002-03-18

申请人： Pascal Debaty

发明人： Pascal Debaty

IPC分类号： H03K19094

CPC分类号： H03K3/356113 ,  H03K17/102

摘要： A circuit for shifting at least one input switching signal includes a CMOS bistable circuit having two branches, and a circuit for accelerating the switching of the bistable circuit. The circuit for accelerating the switching allows an output transistor of each branch to be switched to the off state when an input transistor of the branch switches to the on state. The circuit for accelerating switching includes, for at least one given branch, an associated current mirror generating a turn-off current for the output transistor of the branch on the basis of a turn-on current for the input transistor of the branch.

摘要翻译： 用于移位至少一个输入切换信号的电路包括具有两个分支的CMOS双稳态电路和用于加速双稳态电路的切换的电路。 当分支的输入晶体管切换到导通状态时，用于加速开关的电路允许每个分支的输出晶体管切换到截止状态。 用于加速切换的电路包括对于至少一个给定的分支，相关联的电流镜根据分支的输入晶体管的导通电流为分支的输出晶体管产生截止电流。

公开(公告)号：US5939917A

公开(公告)日：1999-08-17

申请号：US979925

申请日：1997-11-26

申请人： Pascal Debaty

发明人： Pascal Debaty

IPC分类号： H03H11/20 ,  H03F3/45

CPC分类号： H03H11/20

摘要： The present invention relates to a voltage-controlled phase shifter including two differential stages, each including a biasing branch and output branches coupled with the output branches of the other stage; two first resistors coupling the output branches to a first supply potential; a first capacitor connected between the output branches; two second resistors connected in series between the biasing branches; a second capacitor connected in series between the two second resistors; means for applying an input signal in the form of a differential current across the second capacitor; and means for supplying, as an output signal, the sum of the current in one of the first resistors and of a predetermined fraction of a corresponding component of the differential current constituting the input signal.

摘要翻译： 本发明涉及一种包括两个差分级的电压控制移相器，每个差分级包括与另一级的输出分支耦合的偏置分支和输出分支; 将输出分支耦合到第一电源电位的两个第一电阻器; 连接在输出分支之间的第一电容器; 两个第二电阻串联连接在偏置支路之间; 串联连接在两个第二电阻之间的第二电容器; 用于以跨过第二电容器的差动电流的形式施加输入信号的装置; 以及用于作为输出信号提供构成输入信号的差分电流中的一个第一电阻器中的电流和预定分数的预定分数作为输出信号的装置。

公开(公告)号：US5438285A

公开(公告)日：1995-08-01

申请号：US32510

申请日：1993-03-17

申请人： Pascal Debaty

发明人： Pascal Debaty

IPC分类号： H03K5/26 ,  H03D13/00 ,  H03L7/089

CPC分类号： H03D13/004

摘要： A phase/frequency comparator includes: two inputs which respectively receive first and second logic signals; a first logic gate which is at an active state during a duration equal to the phase advance of the first signal with respect to the second signal; and a second logic gate which is at an active state during a duration equal to the phase advance of said second signal with respect to the first signal. The phase/frequency comparator also includes: a first switching element operated by the active state of the second gate to prevent transmission to the first gate a state liable to switch the first gate to its active state; and a second switching element operated by the active state of the first gate to prevent transmission to the second gate a state liable to switch the second gate to its active state.

摘要翻译： 相位/频率比较器包括：分别接收第一和第二逻辑信号的两个输入; 第一逻辑门，其在等于相对于第二信号的第一信号的相位提前的持续时间内处于活动状态; 以及第二逻辑门，其在等于所述第二信号相对于第一信号的相位超前的持续时间内处于活动状态。 相位/频率比较器还包括：第一开关元件，其由第二栅极的有效状态操作，以防止向第一栅极传输易于将第一栅极切换到其激活状态的状态; 以及通过第一栅极的有效状态操作的第二开关元件，以防止向第二栅极传输易于将第二栅极切换到其活动状态的状态。