公开(公告)号：US20100184296A1

公开(公告)日：2010-07-22

申请号：US12654987

申请日：2010-01-12

申请人： Hidetaka Nambu ,  Nobuo Hironaga ,  Futoshi Ota ,  Toru Yokoyama ,  Osamu Sugawara ,  Ryo Satou ,  Masato Tamura

发明人： Hidetaka Nambu ,  Nobuo Hironaga ,  Futoshi Ota ,  Toru Yokoyama ,  Osamu Sugawara ,  Ryo Satou ,  Masato Tamura

IPC分类号： H01L21/306 ,  H01L21/3065

CPC分类号： H01L21/67389

摘要： A semiconductor device manufacturing method includes loading plural dry-etched wafers one by one in a container having a side door so as to be disposed substantially horizontally and in layers vertically therein; and blowing out a purge gas horizontally to those wafers loaded in the container for 30 sec or more after all the subject wafers are loaded in the container while the side door is open.

摘要翻译： 半导体器件制造方法包括：将多个干蚀刻晶片一个接一个地装载在具有侧门的容器中，以便基本上水平布置并且在其中垂直地设置; 并且在侧门打开时将所有的被摄体晶片装载到容器中之后，将装载在容器中的那些晶片水平地吹扫吹扫气体30秒以上。

公开(公告)号：US08349087B2

公开(公告)日：2013-01-08

申请号：US12654987

申请日：2010-01-12

申请人： Hidetaka Nambu ,  Nobuo Hironaga ,  Futoshi Ota ,  Toru Yokoyama ,  Osamu Sugawara ,  Ryo Satou ,  Masato Tamura

发明人： Hidetaka Nambu ,  Nobuo Hironaga ,  Futoshi Ota ,  Toru Yokoyama ,  Osamu Sugawara ,  Ryo Satou ,  Masato Tamura

IPC分类号： B08B3/12 ,  B08B6/00 ,  B08B7/00 ,  B08B7/02 ,  C25F1/00 ,  C25F3/30 ,  C25F5/00

CPC分类号： H01L21/67389

摘要： A semiconductor device manufacturing method includes loading plural dry-etched wafers one by one in a container having a side door so as to be disposed substantially horizontally and in layers vertically therein; and blowing out a purge gas horizontally to those wafers loaded in the container for 30 sec or more after all the subject wafers are loaded in the container while the side door is open.

摘要翻译： 半导体器件制造方法包括：将多个干蚀刻晶片一个接一个地装载在具有侧门的容器中，以便基本上水平布置并且在其中垂直地设置; 并且在侧门打开时将所有的被摄体晶片装载到容器中之后，将装载在容器中的那些晶片水平地吹扫吹扫气体30秒以上。

公开(公告)号：US07229921B2

公开(公告)日：2007-06-12

申请号：US10281306

申请日：2002-10-28

申请人： Nobuo Hironaga ,  Toshiyuki Takewaki ,  Hiroyuki Kunishima ,  Yoshiaki Yamamoto

发明人： Nobuo Hironaga ,  Toshiyuki Takewaki ,  Hiroyuki Kunishima ,  Yoshiaki Yamamoto

IPC分类号： H01L21/44 ,  H01L21/4763

CPC分类号： H01L21/02068 ,  H01L21/02074 ,  H01L21/2855 ,  H01L21/32136 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76838 ,  H01L21/76877 ,  H01L21/76889 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a method of manufacturing a semiconductor device, a first wiring line composed of a copper containing metal film is formed on or above a semiconductor substrate. A first interlayer insulating film is formed on a whole surface of the semiconductor substrate to cover the first wiring line. The first interlayer insulating film is selectively removed to form a connection hole reaching the first wiring line. A barrier metal film is formed to cover an inner surface of the connection hole and then a copper containing metal film is formed to fill the connection hole. The copper containing metal film formed outside the connection hole is removed. A second interlayer insulating film is formed on a whole surface of the semiconductor substrate to cover the copper containing metal film formed in the connection hole. The second interlayer insulating film is selectively removed to form a wiring line groove such that the copper containing metal film formed in the connection hole is exposed at a bottom. A barrier metal film is formed to cover an inside of the wiring line groove and then a copper containing metal film is formed to fill the wiring line groove. Then, the copper containing metal film outside the wiring line groove is removed to form a second wiring line.

摘要翻译： 在制造半导体器件的方法中，在半导体衬底上或上方形成由含铜金属膜构成的第一布线。 第一层间绝缘膜形成在半导体衬底的整个表面上以覆盖第一布线。 选择性地去除第一层间绝缘膜以形成到达第一布线的连接孔。 形成阻挡金属膜以覆盖连接孔的内表面，然后形成含铜金属膜以填充连接孔。 除去形成在连接孔外部的含铜金属膜。 在半导体基板的整个表面上形成第二层间绝缘膜，以覆盖形成在连接孔中的含铜金属膜。 选择性地去除第二层间绝缘膜以形成布线槽，使得形成在连接孔中的含铜金属膜在底部露出。 形成阻挡金属膜以覆盖布线槽的内部，然后形成含铜金属膜以填充布线槽。 然后，除去布线线槽外部的含铜金属膜，形成第二布线。

公开(公告)号：US06890864B2

公开(公告)日：2005-05-10

申请号：US10339658

申请日：2003-01-10

申请人： Hidemitsu Aoki ,  Kenichi Nakabeppu ,  Hiroaki Tomimori ,  Toshiyuki Takewaki ,  Nobuo Hironaga ,  Hiroyuki Kunishima

发明人： Hidemitsu Aoki ,  Kenichi Nakabeppu ,  Hiroaki Tomimori ,  Toshiyuki Takewaki ,  Nobuo Hironaga ,  Hiroyuki Kunishima

IPC分类号： H01L21/306 ,  H01L21/311 ,  H01L21/768 ,  H01L23/532 ,  H01L21/302 ,  H01L21/31

CPC分类号： H01L21/76844 ,  H01L21/02052 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76838 ,  H01L23/53228 ,  H01L23/53242 ,  H01L2924/0002 ,  H01L2924/00

摘要： There are provided a semiconductor device fabricating method for forming a wiring layer on a semiconductor substrate, followed by cleaning, which may prevent elution and oxidation of the wiring layer, and a treating liquid used in the fabricating method. A Cu wiring, an interlayer film over the Cu wiring and an opening in the interlyaer film to expose the surface of the Cu wiring are formed in a plasma atmosphere. IPA is sprayed to the semiconductor device, and then, an organic release process is performed thereto with an amine solvent to remove an etching residue. The semiconductor device is rinsed with the IPA again to remove the remaining amine, and then is cleaned with a treating liquid, which is alkalescent. Then, it is rinsed with pure water or CO2 water and is dried.

摘要翻译： 提供了一种半导体器件制造方法，用于在半导体衬底上形成布线层，然后进行清洁，这可以防止布线层的洗脱和氧化，以及制造方法中使用的处理液。 在等离子体气氛中形成Cu布线，Cu布线上的中间膜和在Intereraer膜中的露出Cu布线的表面的开口。 将IPA喷涂到半导体器件上，然后用胺溶剂对其进行有机释放处理以除去蚀刻残留物。 再次用IPA冲洗半导体器件以除去剩余的胺，然后用碱性处理液清洗。 然后用纯水或CO 2水漂洗并干燥。