Debug Circuit Comparing Processor Instruction Set Operating Mode
    3.
    发明申请
    Debug Circuit Comparing Processor Instruction Set Operating Mode 有权
    比较处理器指令集操作模式的调试电路

    公开(公告)号:US20080040587A1

    公开(公告)日:2008-02-14

    申请号:US11463379

    申请日:2006-08-09

    IPC分类号: G06F9/44

    CPC分类号: G06F11/3648

    摘要: A processor is operative to execute two or more instruction sets, each in a different instruction set operating mode. As each instruction is executed, debug circuit comparison the current instruction set operating mode to a target instruction set operating mode sent by a programmer, and outputs an alert or indication in they match. The alert or indication may additionally be dependent upon the instruction address following within a predetermined target address range. The alert or indication may comprise a breakpoint signal that halts execution and/or it is output as an external signal of the processor. The instruction address at which the processor detects a match in the instruction set operating modes may additionally be output. Additionally or alternatively, the alert or indication may comprise starting or stopping a trace operation, causing an exception, or any other known debugger function.

    摘要翻译: 处理器可操作以执行两个或更多个指令集,每个指令集处于不同的指令集操作模式。 当执行每条指令时,调试电路将当前指令集操作模式与编程器发送的目标指令集操作模式进行比较,并输出其中的警报或指示。 警报或指示还可以依赖于在预定目标地址范围内的指令地址。 警报或指示可以包括停止执行的断点信号和/或作为处理器的外部信号输出的断点信号。 可以另外输出处理器在指令集操作模式中检测到匹配的指令地址。 附加地或替代地,警报或指示可以包括启动或停止跟踪操作,引起异常或任何其他已知的调试器功能。

    Debug circuit comparing processor instruction set operating mode
    4.
    发明授权
    Debug circuit comparing processor instruction set operating mode 有权
    调试电路比较处理器指令集的工作模式

    公开(公告)号:US08352713B2

    公开(公告)日:2013-01-08

    申请号:US11463379

    申请日:2006-08-09

    IPC分类号: G06F9/48

    CPC分类号: G06F11/3648

    摘要: A processor is operative to execute two or more instruction sets, each in a different instruction set operating mode. As each instruction is executed, debug circuit comparison the current instruction set operating mode to a target instruction set operating mode sent by a programmer, and outputs an alert or indication in they match. The alert or indication may additionally be dependent upon the instruction address following within a predetermined target address range. The alert or indication may comprise a breakpoint signal that halts execution and/or it is output as an external signal of the processor. The instruction address at which the processor detects a match in the instruction set operating modes may additionally be output. Additionally or alternatively, the alert or indication may comprise starting or stopping a trace operation, causing an exception, or any other known debugger function.

    摘要翻译: 处理器可操作以执行两个或更多个指令集,每个指令集处于不同的指令集操作模式。 当执行每条指令时,调试电路将当前指令集操作模式与编程器发送的目标指令集操作模式进行比较,并输出其中的警报或指示。 警报或指示还可以依赖于在预定目标地址范围内的指令地址。 警报或指示可以包括停止执行的断点信号和/或作为处理器的外部信号输出的断点信号。 可以另外输出处理器在指令集操作模式中检测到匹配的指令地址。 附加地或替代地,警报或指示可以包括启动或停止跟踪操作,引起异常或任何其他已知的调试器功能。