Abstract:
A compressed air cannon includes a launch pipe and a gas tube. The launch pipe has a closed end and an open end. The gas tube is into the top of the launch pipe, where the gas tube has an outlet directed toward the closed end of the launch pipe.
Abstract:
A confetti cannon includes a one-piece housing. The one-piece housing has a confetti hopper, a launch tube, and a valve housing. The valve housing has an inlet connected to an internal valve. Whereby, the confetti hopper, the launch tube, and the valve housing are integrally formed to create the one-piece housing. The internal valve can be an electric solenoid valve for controlling the confetti cannon remotely.
Abstract:
The present invention is a sensor interface or network of interfaces that utilizes high-temperature electronics to operate at elevated temperatures for applications that include but are not limited to aircraft and automobile engines, vehicle frames, refineries, nuclear and chemical production plants, and in downhole drilling for petroleum and natural gas. The interface or network provide connectors for a variety of sensors with analog and digital outputs, and can in turn provide data to an automated electronic control system or a monitor. Because the sensor interface may be placed in so-called “hot zones” nearer to the sensors being monitored than other systems that use conventional electronics, the sensor interface can increase noise immunity, increase reliability, decrease cost, reduce weight, and increase space.
Abstract:
The present invention is generally directed to a method of manufacturing sidewall spacers on a memory device, and a memory device comprising such sidewall spacers. In one illustrative embodiment, the method includes forming sidewall spacers on a memory device comprised of a memory array and at least one peripheral circuit by forming a first sidewall spacer adjacent a word line structure in the memory array, the first sidewall spacer having a first thickness and forming a second sidewall spacer adjacent a transistor structure in the peripheral circuit, the second sidewall spacer having a second thickness that is greater than the first thickness, wherein the first and second sidewall spacers comprise material from a single layer of spacer material. In one illustrative embodiment, the device includes a memory array comprised of a plurality of word line structures, each of the plurality of word line structures having a first sidewall spacer formed adjacent thereto, the first sidewall spacer having a first thickness, and a peripheral circuit comprised of at least one transistor having a second sidewall spacer formed adjacent thereto, the second sidewall spacer having a second thickness that is greater than the first thickness, the first and second sidewall spacers comprised of a material from a single layer of spacer material.
Abstract:
Example embodiments of the systems and methods of order fulfillment provided herein receive an order from a potential customer and provide automatic fulfillment by one or more of multiple suppliers, based on one or more factors, the factors including at least one of distance, product availability, pricing, equipment age, and percentage of order fulfillment capability. In an example embodiment, one or more databases will be maintained, or one or more tables within a database. One database/table is for the consumer, one database/table for the enablement processing, which may be referred to as a call center (though no actual calls may take place), and a third vendor database/table.
Abstract:
The systems and methods of illuminating instrument features disclosed herein provide for the illumination of the interior of an instrument, such as an acoustic guitar with a “sound hole”, and a drum, among others, with an illumination source (a non-limiting example is light emitting diodes (LEDs)). One or more illumination sources may be attached to the inside of the instrument to direct light such that the hole is illuminated. The illuminated opening may reveal as non-limiting examples, logos, art work, messages, wording, and text, among others.
Abstract:
A compressed air cannon includes a launch pipe and a gas tube. The launch pipe has a closed end and an open end. The gas tube is into the top of the launch pipe, where the gas tube has an outlet directed toward the closed end of the launch pipe.
Abstract:
The present invention is generally directed to a method of manufacturing sidewall spacers on a memory device, and a memory device comprising such sidewall spacers. In one illustrative embodiment, the method includes forming sidewall spacers on a memory device comprised of a memory array and at least one peripheral circuit by forming a first sidewall spacer adjacent a word line structure in the memory array, the first sidewall spacer having a first thickness and forming a second sidewall spacer adjacent a transistor structure in the peripheral circuit, the second sidewall spacer having a second thickness that is greater than the first thickness, wherein the first and second sidewall spacers comprise material from a single layer of spacer material. In one illustrative embodiment, the device includes a memory array comprised of a plurality of word line structures, each of the plurality of word line structures having a first sidewall spacer formed adjacent thereto, the first sidewall spacer having a first thickness, and a peripheral circuit comprised of at least one transistor having a second sidewall spacer formed adjacent thereto, the second sidewall spacer having a second thickness that is greater than the first thickness, the first and second sidewall spacers comprised of a material from a single layer of spacer material.
Abstract:
The present invention is generally directed to a method of manufacturing sidewall spacers on a memory device, and a memory device comprising such sidewall spacers. In one illustrative embodiment, the method includes forming sidewall spacers on a memory device comprised of a memory array and at least one peripheral circuit by forming a first sidewall spacer adjacent a word line structure in the memory array, the first sidewall spacer having a first thickness and forming a second sidewall spacer adjacent a transistor structure in the peripheral circuit, the second sidewall spacer having a second thickness that is greater than the first thickness, wherein the first and second sidewall spacers comprise material from a single layer of spacer material. In one illustrative embodiment, the device includes a memory array comprised of a plurality of word line structures, each of the plurality of word line structures having a first sidewall spacer formed adjacent thereto, the first sidewall spacer having a first thickness, and a peripheral circuit comprised of at least one transistor having a second sidewall spacer formed adjacent thereto, the second sidewall spacer having a second thickness that is greater than the first thickness, the first and second sidewall spacers comprised of a material from a single layer of spacer material.
Abstract:
A plurality of processes share a single set of non-resettable counters which are sampled periodically. Each process maintains a list of counter relationships unique to its own process and compares at each sample time the current sampled counter values with a selected function of previously received counter values for each relationship in its list and establishes a counter reset value which is a selected function of the current sampled value when the previously selected function is satisfied.