Apparatus and method for selected site backside unlayering of si, GaAs, GaxAlyAszof SOI technologies for scanning probe microscopy and atomic force probing characterization
    1.
    发明授权
    Apparatus and method for selected site backside unlayering of si, GaAs, GaxAlyAszof SOI technologies for scanning probe microscopy and atomic force probing characterization 有权
    用于扫描探针显微镜和原子力探测表征的si,GaAs,GaxAlyAszof SOI技术的选择位置背面分层的装置和方法

    公开(公告)号:US07205237B2

    公开(公告)日:2007-04-17

    申请号:US11160667

    申请日:2005-07-05

    IPC分类号: H01L21/461 C23F1/00

    摘要: Apparatus for exposure and probing of features in a semiconductor workpiece includes a hollow concentrator for covering a portion of the workpiece connected by a gas conduit to a supply of etchant gas. A stage supports and positions the semiconductor workpiece. Control means moves the stage and the semiconductor workpiece to the series of positions sequentially. An energy beam source directs a focused energy beam through an aperture through the concentrator onto a region on the surface of the workpiece in the presence of the etchant gas. The control means moves the stage to a series of positions with respect to the concentrator and the energy beam to direct the energy beam in the presence of the etchant gas to expose a series of regions on the surface of the semiconductor workpiece positioned below the hollow interior space of the concentrator, sequentially.

    摘要翻译: 用于在半导体工件中曝光和探测特征的装置包括中空聚焦器,用于将通过气体导管连接的工件的一部分覆盖到蚀刻剂气体的供应。 舞台支撑并定位半导体工件。 控制装置依次将平台和半导体工件移动到一系列位置。 在存在蚀刻剂气体的情况下,能量束源将聚焦能量束通过穿过浓缩器的孔引导到工件表面上的区域上。 控制装置将台架相对于集中器和能量束移动到一系列位置,以在存在蚀刻剂气体的情况下引导能量束,以暴露位于中空内部的半导体工件表面上的一系列区域 集中器的空间顺序。

    Programmable precision resistor and method of programming the same
    2.
    发明授权
    Programmable precision resistor and method of programming the same 有权
    可编程精密电阻及其编程方法

    公开(公告)号:US07881093B2

    公开(公告)日:2011-02-01

    申请号:US12185375

    申请日:2008-08-04

    摘要: A link portion between a first electrode and a second electrode includes a semiconductor link portion and a metal semiconductor alloy link portion comprising a first metal semiconductor alloy. An electrical pulse converts the entirety of the link portion into a second metal semiconductor alloy having a lower concentration of metal than the first metal semiconductor alloy. Due to the stoichiometric differences between the first and second metal semiconductor alloys, the link portion has a higher resistance after programming than prior to programming. The shift in electrical resistance well controlled, which is advantageously employed to as a programmable precision resistor.

    摘要翻译: 第一电极和第二电极之间的连接部分包括半导体连接部分和包括第一金属半导体合金的金属半导体合金连接部分。 电脉冲将整个连接部分转换成具有比第一金属半导体合金低的金属浓度的第二金属半导体合金。 由于第一和第二金属半导体合金之间的化学计量差异,链接部分在编程之后具有比编程之前更高的电阻。 良好控制的电阻的偏移,其有利地用作可编程精密电阻器。

    APPARATUS AND METHOD FOR SELECTED SITE BACKSIDE UNLAYERING OF SILICON, GAAS, GAXALYASZ OF SOI TECHNOLOGIES FOR SCANNING PROBE MICROSCOPY AND ATOMIC FORCE PROBING CHARACTERIZATION
    3.
    发明申请
    APPARATUS AND METHOD FOR SELECTED SITE BACKSIDE UNLAYERING OF SILICON, GAAS, GAXALYASZ OF SOI TECHNOLOGIES FOR SCANNING PROBE MICROSCOPY AND ATOMIC FORCE PROBING CHARACTERIZATION 有权
    用于扫描探针显微镜和原子力探测特征的SOI技术的硅,GAAS,GAXALYASZ的选择场所的背景设备和方法

    公开(公告)号:US20070010097A1

    公开(公告)日:2007-01-11

    申请号:US11160667

    申请日:2005-07-05

    IPC分类号: H01L21/302

    摘要: Apparatus for exposure and probing of features in a semiconductor workpiece includes a hollow concentrator for covering a portion of the workpiece connected by a gas conduit to a supply of etchant gas. A stage supports and positions the semiconductor workpiece. Control means moves the stage and the semiconductor workpiece to the series of positions sequentially. An energy beam source directs a focused energy beam through an aperture through the concentrator onto a region on the surface of the workpiece in the presence of the etchant gas. The control means moves the stage to a series of positions with respect to the concentrator and the energy beam to direct the energy beam in the presence of the etchant gas to expose a series of regions on the surface of the semiconductor workpiece positioned below the hollow interior space of the concentrator, sequentially.

    摘要翻译: 用于在半导体工件中曝光和探测特征的装置包括中空聚焦器,用于将通过气体导管连接的工件的一部分覆盖到蚀刻剂气体的供应。 舞台支撑并定位半导体工件。 控制装置依次将平台和半导体工件移动到一系列位置。 在存在蚀刻剂气体的情况下,能量束源将聚焦能量束通过穿过浓缩器的孔引导到工件表面上的区域上。 控制装置将台架相对于集中器和能量束移动到一系列位置,以在存在蚀刻剂气体的情况下引导能量束,以暴露位于中空内部的半导体工件表面上的一系列区域 集中器的空间顺序。

    Backside unlayering of MOSFET devices for electrical and physical characterization
    4.
    发明申请
    Backside unlayering of MOSFET devices for electrical and physical characterization 失效
    用于电气和物理表征的MOSFET器件的背面非层叠

    公开(公告)号:US20050148157A1

    公开(公告)日:2005-07-07

    申请号:US10752162

    申请日:2004-01-06

    摘要: A method and system for backside unlayering a semiconductor device to expose FEOL semiconductor features of the device for subsequent electrical and/or physical probing. A window is formed within a backside substrate layer of the semiconductor. A collimated ion plasma is generated and directed so as to contact the semiconductor only within the backside window via an opening in a focusing shield. This focused collimated ion plasma contacts the semiconductor, only within the window, while the semiconductor is simultaneously being rotated and tilted by a temperature controlled stage, for uniform removal of semiconductor layering such that the semiconductor features, in a location on the semiconductor corresponding to the backside window, are exposed. Backside unlayering of the invention may be enhanced by CAIBE processing.

    摘要翻译: 一种用于背面非层叠半导体器件以暴露设备的FEOL半导体特征以用于随后的电和/或物理探测的方法和系统。 在半导体的背面基板层内形成窗口。 产生并引导准直离子等离子体,以便仅通过聚焦屏蔽件中的开口在后侧窗口内接触半导体。 这种聚焦的准直离子等离子体仅在窗口内接触半导体,同时半导体同时被温度控制的阶段旋转和倾斜,以均匀地去除半导体层,使得半导体特征在半导体上对应于 后视窗,曝光。 通过CAIBE处理可以增强本发明的背面未铺层。

    Backside unlayering of MOSFET devices for electrical and physical characterization
    6.
    发明申请
    Backside unlayering of MOSFET devices for electrical and physical characterization 有权
    用于电气和物理表征的MOSFET器件的背面非层叠

    公开(公告)号:US20060030160A1

    公开(公告)日:2006-02-09

    申请号:US11242719

    申请日:2005-10-03

    IPC分类号: A61N5/00 H01L21/302

    摘要: A method and system for backside unlayering a semiconductor device to expose FEOL semiconductor features of the device for subsequent electrical and/or physical probing. A window is formed within a backside substrate layer of the semiconductor. A collimated ion plasma is generated and directed so as to contact the semiconductor only within the backside window via an opening in a focusing shield. This focused collimated ion plasma contacts the semiconductor, only within the window, while the semiconductor is simultaneously being rotated and tilted by a temperature controlled stage, for uniform removal of semiconductor layering such that the semiconductor features, in a location on the semiconductor corresponding to the backside window, are exposed. Backside unlayering of the invention may be enhanced by CAIBE processing.

    摘要翻译: 一种用于背面非层叠半导体器件以暴露设备的FEOL半导体特征以用于随后的电和/或物理探测的方法和系统。 在半导体的背面基板层内形成窗口。 产生并引导准直离子等离子体,以便仅通过聚焦屏蔽件中的开口在后侧窗口内接触半导体。 这种聚焦的准直离子等离子体仅在窗口内接触半导体,同时半导体同时被温度控制的阶段旋转和倾斜,以均匀地去除半导体层,使得半导体特征在半导体上对应于 后视窗,曝光。 通过CAIBE处理可以增强本发明的背面未铺层。

    SITE-SPECIFIC METHODOLOGY FOR LOCALIZATION AND ANALYZING JUNCTION DEFECTS IN MOSFET DEVICES
    7.
    发明申请
    SITE-SPECIFIC METHODOLOGY FOR LOCALIZATION AND ANALYZING JUNCTION DEFECTS IN MOSFET DEVICES 失效
    用于本地化和分析MOSFET器件中的结点缺陷的特定方法

    公开(公告)号:US20050064610A1

    公开(公告)日:2005-03-24

    申请号:US10605258

    申请日:2003-09-18

    IPC分类号: G01R31/307 H01L21/66

    摘要: This invention relates to a method for electrically localizing site-specific defective sub 130 nm node MOSFET devices with shallow (less than 80 nm deep) source/drain junctions utilizing bulk silicon, or Silicon on Insulator (SOI), or strained silicon (SE), followed by optimized sample preparation steps that permits imaging, preferably high resolution electron holographic imaging, in an electron microscope to detect blocked implants, asymmetric doping, or channel length variations affecting MOSFET device performance. Detection of such defects in such shallow junctions enables further refinements in process simulation models and permits optimization of MOSFET device designs.

    摘要翻译: 本发明涉及一种利用体硅或绝缘体上硅(SOI)或应变硅(SE)的具有浅(小于80nm深)源极/漏极结的电位定位缺陷子130nm节点MOSFET器件的方法, ,然后进行优化的样品制备步骤,其允许在电子显微镜中成像,优选高分辨率电子全息成像,以检测影响MOSFET器件性能的封闭植入物,不对称掺杂或沟道长度变化。 在这种浅结中的这种缺陷的检测使得能够进一步改进工艺仿真模型并允许优化MOSFET器件设计。

    PROGRAMMABLE PRECISION RESISTOR AND METHOD OF PROGRAMMING THE SAME
    9.
    发明申请
    PROGRAMMABLE PRECISION RESISTOR AND METHOD OF PROGRAMMING THE SAME 有权
    可编程精度电阻器及其编程方法

    公开(公告)号:US20100025819A1

    公开(公告)日:2010-02-04

    申请号:US12185375

    申请日:2008-08-04

    IPC分类号: H01L29/00

    摘要: A link portion between a first electrode and a second electrode includes a semiconductor link portion and a metal semiconductor alloy link portion comprising a first metal semiconductor alloy. An electrical pulse converts the entirety of the link portion into a second metal semiconductor alloy having a lower concentration of metal than the first metal semiconductor alloy. Due to the stoichiometric differences between the first and second metal semiconductor alloys, the link portion has a higher resistance after programming than prior to programming. The shift in electrical resistance well controlled, which is advantageously employed to as a programmable precision resistor.

    摘要翻译: 第一电极和第二电极之间的连接部分包括半导体连接部分和包括第一金属半导体合金的金属半导体合金连接部分。 电脉冲将整个连接部分转换成具有比第一金属半导体合金低的金属浓度的第二金属半导体合金。 由于第一和第二金属半导体合金之间的化学计量差异,链接部分在编程之后具有比编程之前更高的电阻。 良好控制的电阻的偏移,其有利地用作可编程精密电阻器。