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公开(公告)号：US20230397641A1
公开(公告)日：2023-12-14
申请号：US18250386
申请日：2021-10-25
申请人： Lee WRIGHT
发明人： Lee WRIGHT
摘要： There is described a grindable spherical or substantially spherical culinary bead, comprising at least one comestible powder, a carrier powder, a starter core, a binding agent, at least one essential flavour oil, and a liquid solution. The bead can be ground to provide flavouring to food or beverages. There is also described methods of producing said product.
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2.发明授权Chromene derivatives and use thereof as HIF hydroxylase activity inhibitors 有权色烯衍生物及其作为HIF羟化酶活性抑制剂的用途公开(公告)号：US08324405B2
公开(公告)日：2012-12-04
申请号：US12866023
申请日：2009-02-05
申请人： Wen-bin Ho , Lee Wright , Shaojiang Deng , Eric Turtle , Lee A. Flippin
发明人： Wen-bin Ho , Lee Wright , Shaojiang Deng , Eric Turtle , Lee A. Flippin
IPC分类号： C07D311/02
CPC分类号： C07D311/92 , C07D311/56 , C07D405/04 , C07D407/04 , C07D409/04
摘要： The present invention relates to novel compounds of formula (I), methods, and compositions capable of decreasing HIF hydroxylase activity, thereby increasing the stability and/or activity of hypoxia inducible factor (HIF).
摘要翻译： 本发明涉及能够降低HIF羟化酶活性，从而增加缺氧诱导因子（HIF）的稳定性和/或活性的新型式（I）化合物，方法和组合物。
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公开(公告)号：US20120225826A1
公开(公告)日：2012-09-06
申请号：US13248783
申请日：2011-09-29
申请人： Paul A. Wender , Jonathan B. Rothbard , Lee Wright , Erik L. Kreider , Christopher J. VanDeusen
发明人： Paul A. Wender , Jonathan B. Rothbard , Lee Wright , Erik L. Kreider , Christopher J. VanDeusen
CPC分类号： A61K47/64
摘要： The present invention provides compositions and methods for enhancing transport of biologically active compounds across biological membranes and across and into animal epithelial or endothelial tissues. The composition includes a biologically active agent and a transport moiety. The transport moiety includes a structure selected from the group consisting of (ZYZ)nZ, (ZY)nZ, (ZYY)nZ and (ZYYY)nZ. Subunit “Z” is L-arginine or D-arginine, and subunit “Y” is an amino acid that does not comprise an amidino or guanidino moiety. Subscript “n” is an integer ranging from 2 to 10. The method for enhancing transport involves the administration of the aforementioned composition.
摘要翻译： 本发明提供用于增强生物活性化合物跨越生物膜并跨越动物上皮细胞或内皮组织的转运的组合物和方法。 组合物包括生物活性剂和运输部分。 运输部分包括选自（ZYZ）nZ，（ZY）nZ，（ZYY）nZ和（ZYYY）nZ的结构。 亚基“Z”是L-精氨酸或D-精氨酸，亚基“Y”是不包含脒基或胍基部分的氨基酸。 下标“n”是从2到10的整数。用于增强转运的方法涉及上述组合物的给药。
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4.发明授权Method and data processing system for microprocessor communication in a cluster-based multi-processor system 失效基于群集的多处理器系统中微处理器通信的方法和数据处理系统公开(公告)号：US07818364B2
公开(公告)日：2010-10-19
申请号：US11952479
申请日：2007-12-07
IPC分类号： G06F15/76 , G06F15/163
CPC分类号： H04L69/16 , G06F15/17 , H04L12/42 , H04L67/1002 , H04L69/161 , H04W28/14
摘要： A processor communication register (PCR) contained within a multiprocessor cluster system provides enhanced processor communication. The PCR stores information that is useful in pipelined or parallel multi-processing. Each processor cluster has exclusive rights to store to a sector within the PCR and has continuous access to read its contents. Each processor cluster updates its exclusive sector within the PCR, instantly allowing all of the other processors within the cluster network to see the change within the PCR data, and bypassing the cache subsystem. Efficiency is enhanced within the processor cluster network by providing processor communications to be immediately networked and transferred into all processors without momentarily restricting access to the information or forcing all the processors to be continually contending for the same cache line, and thereby overwhelming the interconnect and memory system with an endless stream of load, store and invalidate commands.
摘要翻译： 包含在多处理器集群系统内的处理器通信寄存器（PCR）提供增强的处理器通信。 PCR存储在流水线或并行多处理中有用的信息。 每个处理器集群具有存储到PCR中的扇区的独占权限，并且具有连续访问以读取其内容。 每个处理器集群在PCR中更新其独占部分，立即允许集群网络内的所有其他处理器查看PCR数据中的更改，并绕过缓存子系统。 处理器集群网络中的效率得到提高，通过提供处理器通信来立即联网并传输到所有处理器中，而不会立即限制对信息的访问，或迫使所有处理器持续竞争相同的高速缓存行，从而压倒互连和内存 系统具有无限的加载流，存储和无效命令。
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5.发明授权Method, processing unit and data processing system for microprocessor communication in a multi-processor system 失效用于多处理器系统中微处理器通信的方法，处理单元和数据处理系统公开(公告)号：US07356568B2
公开(公告)日：2008-04-08
申请号：US10318514
申请日：2002-12-12
IPC分类号： G06F13/00
CPC分类号： G06F9/30101
摘要： A processor communication register (PCR) contained in each processor within a multiprocessor system provides enhanced processor communication. Each PCR stores identical processor communication information that is useful in pipelined or parallel multi-processing. Each processor has exclusive rights to store to a sector within each PCR and has continuous access to read the contents of its own PCR. Each processor updates its exclusive sector within all of the PCRs, instantly allowing all of the other processors to see the change within the PCR data, and bypassing the cache subsystem. Efficiency is enhanced within the multiprocessor system by providing processor communications to be immediately transferred into all processors without momentarily restricting access to the information or forcing all the processors to be continually contending for the same cache line, and thereby overwhelming the interconnect and memory system with an endless stream of load, store and invalidate commands.
摘要翻译： 包含在多处理器系统内的每个处理器中的处理器通信寄存器（PCR）提供增强的处理器通信。 每个PCR存储在流水线或并行多处理中有用的相同的处理器通信信息。 每个处理器具有存储在每个PCR内的扇区的专有权利，并且具有连续访问以读取其自己的PCR的内容。 每个处理器在所有PCR中更新其独占扇区，立即允许所有其他处理器查看PCR数据中的更改，并绕过缓存子系统。 通过提供处理器通信以立即转移到所有处理器中而不会立即限制对信息的访问或迫使所有处理器连续地竞争相同的高速缓存行，从而将互连和存储系统压倒在一起，从而在多处理器系统中提高效率 无限流的加载，存储和无效命令。
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6.发明授权Method to preserve ordering of read and write operations in a DMA system by delaying read access 有权通过延迟读访问来保持DMA系统中读写操作顺序的方法公开(公告)号：US07243194B2
公开(公告)日：2007-07-10
申请号：US11054403
申请日：2005-02-09
IPC分类号： G06F12/00
CPC分类号： G06F13/28 , G06F12/0815 , G06F12/0897
摘要： A method, system and computer program product for handling write requests in a data processing system is disclosed. The method comprises receiving on an interconnect bus a first write request targeted to a first address and receiving on the interconnect bus a subsequent second write request targeted to a subsequent second address. The subsequent second write request is completed prior to completing the first write request, and, responsive to receiving a read request targeting the second address before the first write request has completed, data associated with the second address of the second write request is supplied only after the first write request completes.
摘要翻译： 公开了一种用于在数据处理系统中处理写入请求的方法，系统和计算机程序产品。 该方法包括在互连总线上接收针对第一地址的第一写入请求，并且在互连总线上接收针对随后的第二地址的后续的第二写入请求。 随后的第二写请求在完成第一写请求之前完成，并且响应于在第一写请求完成之前接收到针对第二地址的读请求，与第二写请求的第二地址相关联的数据仅在 第一个写请求完成。
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公开(公告)号：US07187161B2
公开(公告)日：2007-03-06
申请号：US10617641
申请日：2003-07-11
申请人： Wendell Lee Wright
发明人： Wendell Lee Wright
摘要： The present invention includes a system with a sensor to detect a change in one or more physical characteristics and provide a corresponding electrical sensor signal, a controller including a power source for the sensor, and transient suppression circuitry. This circuitry is coupled between the sensor and the power source of the controller, and includes a first thermistor to protect the sensor from a power surge from the controller and/or power source.
摘要翻译： 本发明包括具有传感器的系统，用于检测一个或多个物理特性的变化并提供对应的电传感器信号，包括用于传感器的电源的控制器和瞬态抑制电路。 该电路耦合在传感器和控制器的电源之间，并且包括第一热敏电阻以保护传感器免受来自控制器和/或电源的电力浪涌。
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8.发明授权Method and system of managing virtualized physical memory in a data processing system 失效在数据处理系统中管理虚拟物理存储器的方法和系统公开(公告)号：US06920521B2
公开(公告)日：2005-07-19
申请号：US10268741
申请日：2002-10-10
CPC分类号： G06F12/0292 , G06F12/0646
摘要： A move engine and operating system transparently reconfigure physical memory to accomplish addition, subtraction, or replacement of a memory module. The operating system stores FROM and TO real addresses in unique fields in memory that are used to virtualize the physical address of the memory module being reconfigured and provide the reconfiguration in real-time through the use of hardware functionality and not software. Using the FROM and TO real addresses to select a source and a target, the move engine copies the contents of the memory module to be removed or reconfigured into the remaining or inserted memory module. Then, the real address associated with the reconfigured memory module is re-assigned to the memory module receiving the copied contents, thereby creating a virtualized physical mapping from the addressable real address space being utilized by the operating system into a virtual physical address space. During the process of moving the memory contents, the operating system stalls. Write memory requests addressed to the real address space currently associated with the sourcing memory module indicated by either the FROM or TO real address space. As will be appreciated, a memory module can be inserted, removed or replaced in physical memory without the operating system having to stop all memory operations in the memory to accomplish the physical memory change.
摘要翻译： 移动引擎和操作系统透明地重新配置物理内存以实现内存模块的加法，减法或更换。 操作系统将FROM和TO存储在存储器中的唯一字段中存储，用于虚拟化正在重新配置的存储器模块的物理地址，并通过使用硬件功能而不是软件来实时提供重新配置。 使用FROM和TO实地址选择源和目标，移动引擎将要删除或重新配置的内存模块的内容复制到剩余或插入的内存模块中。 然后，将与重新配置的存储器模块相关联的真实地址重新分配给接收复制内容的存储器模块，从而由操作系统利用的可寻址实地址空间创建虚拟物理映射到虚拟物理地址空间。 在移动存储器内容的过程中，操作系统停顿。 将存储器请求写入到由FROM或TO实地址空间指示的当前与源存储器模块相关联的实际地址空间。 如将理解的，可以在物理存储器中插入，移除或替换存储器模块，而不需要操作系统停止存储器中的所有存储器操作来完成物理存储器改变。
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公开(公告)号：US06785773B2
公开(公告)日：2004-08-31
申请号：US09821078
申请日：2001-03-29
IPC分类号： G06F1200
CPC分类号： G06F11/261
摘要： A system and method for verifying cache coherency in a multi-node, NUMA system includes a transaction modification unit configured to receive event traces generated by a simulation tool. The modification unit modifies transactions that are propagated to another node in the NUMA system and thus result in two bus transactions, a home node transaction (HNT) and a foreign node transaction (FNT). More specifically, the modification unit merges a FNT and its corresponding HNT into a single merge transaction (MT) under a prescribed set of merging rules. The MT has properties of the both the FNT and the HNT. The FNT and HNT are deleted from the event trace and replaced by their corresponding MT to create a modified event trace that is suitable for coherency checking by a single system coherency checker.
摘要翻译： 一种用于在多节点NUMA系统中验证高速缓存一致性的系统和方法包括被配置为接收由仿真工具生成的事件跟踪的事务修改单元。 修改单元修改传播到NUMA系统中另一个节点的事务，从而导致两个总线事务，家庭节点事务（HNT）和外部节点事务（FNT）。 更具体地，修改单元在规定的合并规则集合下将FNT及其对应的HNT合并到单个合并事务（MT）中。 MT具有FNT和HNT两者的性质。 FNT和HNT从事件跟踪中删除，并由其相应的MT替换，以创建适用于单个系统一致性检查器的一致性检查的修改的事件跟踪。
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公开(公告)号：USD466006S1
公开(公告)日：2002-11-26
申请号：US29149602
申请日：2001-10-12
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