公开(公告)号：US08084343B2

公开(公告)日：2011-12-27

申请号：US12977573

申请日：2010-12-23

Applicant: Tadashi Yamaguchi ,  Koyu Asai ,  Mahito Sawada ,  Kiyoteru Kobayashi ,  Tatsunori Murata ,  Satoshi Shimizu

Inventor： Tadashi Yamaguchi ,  Koyu Asai ,  Mahito Sawada ,  Kiyoteru Kobayashi ,  Tatsunori Murata ,  Satoshi Shimizu

IPC: H01L21/20

CPC classification number: H01L21/76802 ,  H01L21/76801 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76837 ,  H01L23/53295 ,  H01L23/564 ,  H01L2924/0002 ,  H01L2924/13091 ,  H01L2924/00

Abstract: In order to block hydrogen ions produced when forming an interlayer insulating film by HDP-CVD or the like to thereby suppress an adverse effect of the hydrogen ions on a device, in a semiconductor device including a contact layer, a metal interconnection and an interlayer insulating film on a semiconductor substrate having a gate electrode formed thereon, the interlayer insulating film is formed on the metal interconnection by bias-applied plasma CVD using source gas containing hydrogen atoms, and a silicon oxynitride film is provided in the underlayer of the metal interconnection and the interlayer insulating film.

Abstract translation: 为了阻止通过HDP-CVD等形成层间绝缘膜时产生的氢离子，从而抑制氢离子对器件的不利影响，在包括接触层，金属互连和层间绝缘的半导体器件中 在其上形成有栅电极的半导体衬底上，通过使用含氢原子的气体的偏压施加等离子体CVD在金属互连上形成层间绝缘膜，并且在金属互连的底层设置氮氧化硅膜， 层间绝缘膜。

公开(公告)号：US07489040B2

公开(公告)日：2009-02-10

申请号：US11635495

申请日：2006-12-08

Applicant: Koyu Asai ,  Hiroshi Tobimatsu ,  Hiroyuki Kawata ,  Mahito Sawada

Inventor： Koyu Asai ,  Hiroshi Tobimatsu ,  Hiroyuki Kawata ,  Mahito Sawada

IPC: H01L23/48

CPC classification number: H01L23/522 ,  H01L21/768 ,  H01L23/5226 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An interconnection is provided with a dummy interconnection connected to an interconnection body, and the dummy interconnection is provided with a stress concentration portion in which tensile stress higher than that of the interconnection body is generated. In proximity to the stress concentration portion, an insulating film formed by high-density plasma CVD is provided, and the tensile stress is generated in the stress concentration portion by the insulating film. With this structure, the occurrence of a void can be prevented at any position in the interconnection body.

Abstract translation: 互连设置有连接到互连体的虚拟互连，并且虚设互连设置有应力集中部，其中产生比互连体高的拉伸应力。 在应力集中部分附近，设置通过高密度等离子体CVD形成的绝缘膜，并且通过绝缘膜在应力集中部分产生拉伸应力。 利用这种结构，可以防止在互连体中的任何位置发生空隙。

公开(公告)号：US20070096322A1

公开(公告)日：2007-05-03

申请号：US11635495

申请日：2006-12-08

Applicant: Koyu Asai ,  Hiroshi Tobimatsu ,  Hiroyuki Kawata ,  Mahito Sawada

Inventor： Koyu Asai ,  Hiroshi Tobimatsu ,  Hiroyuki Kawata ,  Mahito Sawada

IPC: H01L23/52

CPC classification number: H01L23/522 ,  H01L21/768 ,  H01L23/5226 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An interconnection is provided with a dummy interconnection connected to an interconnection body, and the dummy interconnection is provided with a stress concentration portion in which tensile stress higher than that of the interconnection body is generated. In proximity to the stress concentration portion, an insulating film formed by high-density plasma CVD is provided, and the tensile stress is generated in the stress concentration portion by the insulating film. With this structure, the occurrence of a void can be prevented at any position in the interconnection body.

Abstract translation: 互连设置有连接到互连体的虚拟互连，并且虚设互连设置有应力集中部，其中产生比互连体高的拉伸应力。 在应力集中部分附近，设置通过高密度等离子体CVD形成的绝缘膜，并且通过绝缘膜在应力集中部分产生拉伸应力。 利用这种结构，可以防止在互连体中的任何位置发生空隙。

公开(公告)号：US20110092037A1

公开(公告)日：2011-04-21

申请号：US12977573

申请日：2010-12-23

Applicant: Tadashi Yamaguchi ,  Koyu Asai ,  Mahito Sawada ,  Kiyoteru Kobayashi ,  Tatsunori Murata ,  Satoshi Shimizu

Inventor： Tadashi Yamaguchi ,  Koyu Asai ,  Mahito Sawada ,  Kiyoteru Kobayashi ,  Tatsunori Murata ,  Satoshi Shimizu

IPC: H01L21/336

CPC classification number: H01L21/76802 ,  H01L21/76801 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76837 ,  H01L23/53295 ,  H01L23/564 ,  H01L2924/0002 ,  H01L2924/13091 ,  H01L2924/00

Abstract: In order to block hydrogen ions produced when forming an interlayer insulating film by HDP-CVD or the like to thereby suppress an adverse effect of the hydrogen ions on a device, in a semiconductor device including a contact layer, a metal interconnection and an interlayer insulating film on a semiconductor substrate having a gate electrode formed thereon, the interlayer insulating film is formed on the metal interconnection by bias-applied plasma CVD using source gas containing hydrogen atoms, and a silicon oxynitride film is provided in the underlayer of the metal interconnection and the interlayer insulating film.

Abstract translation: 为了阻止通过HDP-CVD等形成层间绝缘膜时产生的氢离子，从而抑制氢离子对器件的不利影响，在包括接触层，金属互连和层间绝缘的半导体器件中 在其上形成有栅电极的半导体衬底上，通过使用含氢原子的气体的偏压施加等离子体CVD在金属互连上形成层间绝缘膜，并且在金属互连的底层设置氮氧化硅膜， 层间绝缘膜。

公开(公告)号：US20080014760A1

公开(公告)日：2008-01-17

申请号：US11765703

申请日：2007-06-20

Applicant: Tatsunori MURATA ,  Koyu Asai ,  Hiroaki Iuchi

Inventor： Tatsunori MURATA ,  Koyu Asai ,  Hiroaki Iuchi

IPC: H01L21/469 ,  H01L29/788

CPC classification number: H01L27/115 ,  H01L21/28273 ,  H01L21/7682 ,  H01L21/76834 ,  H01L27/11521 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14643 ,  H01L27/14689 ,  H01L29/42324

Abstract: When microfabrication is done, a reliable semiconductor device is offered.A semiconductor device has a semiconductor substrate which has a main front surface, a plurality of convex patterns formed on the main front surface of a semiconductor substrate so that each might have a floating gate and a control gate, a first insulating film formed so that the upper surface and the side surface of each of a plurality of convex patterns might be covered, and so that width might become large rather than the portion which covers the lower part side surface of a convex pattern in the portion which covers an upper part side surface, and a second insulating film that covers the upper surface and the side surface of the first insulating film so that the cavity between the adjacent convex patterns may be occluded. The position occluded by the second insulating film of a cavity is a position higher than the upper surface of a floating gate, and is a position lower than the upper surface of a control gate.

Abstract translation: 当进行微细加工时，提供可靠的半导体器件。 半导体器件具有半导体衬底，该半导体衬底具有主前表面，多个凸形图案形成在半导体衬底的主表面上，以便可以具有浮置栅极和控制栅极，第一绝缘膜形成为使得 可以覆盖多个凸形图案中的每一个的上表面和侧表面，并且使得宽度可能变大，而不是覆盖覆盖上部侧表面的部分中的凸形图案的下部侧表面的部分 以及覆盖第一绝缘膜的上表面和侧表面的第二绝缘膜，使得相邻凸形图案之间的空腔可能被遮挡。 由空腔的第二绝缘膜封闭的位置是比浮动栅极的上表面高的位置，并且是比控制栅极的上表面低的位置。

公开(公告)号：US07154184B2

公开(公告)日：2006-12-26

申请号：US10725384

申请日：2003-12-03

Applicant: Koyu Asai ,  Hiroshi Tobimatsu ,  Hiroyuki Kawata ,  Mahito Sawada

Inventor： Koyu Asai ,  Hiroshi Tobimatsu ,  Hiroyuki Kawata ,  Mahito Sawada

IPC: H01L23/48

CPC classification number: H01L23/522 ,  H01L21/768 ,  H01L23/5226 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An interconnection is provided with a dummy interconnection connected to an interconnection body, and the dummy interconnection is provided with a stress concentration portion in which tensile stress higher than that of the interconnection body is generated. In proximity to the stress concentration portion, an insulating film formed by high-density plasma CVD is provided, and the tensile stress is generated in the stress concentration portion by the insulating film. With this structure, the occurrence of a void can be prevented at any position in the interconnection body.

公开(公告)号：US20060091451A1

公开(公告)日：2006-05-04

申请号：US11254725

申请日：2005-10-21

Applicant: Tadashi Yamaguchi ,  Koyu Asai ,  Mahito Sawada ,  Kiyoteru Kobayashi ,  Tatsunori Murata ,  Satoshi Shimizu

Inventor： Tadashi Yamaguchi ,  Koyu Asai ,  Mahito Sawada ,  Kiyoteru Kobayashi ,  Tatsunori Murata ,  Satoshi Shimizu

IPC: H01L23/52

CPC classification number: H01L21/76802 ,  H01L21/76801 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76837 ,  H01L23/53295 ,  H01L23/564 ,  H01L2924/0002 ,  H01L2924/13091 ,  H01L2924/00

Abstract: In order to block hydrogen ions produced when forming an interlayer insulating film by HDP-CVD or the like to thereby suppress an adverse effect of the hydrogen ions on a device, in a semiconductor device including a contact layer, a metal interconnection and an interlayer insulating film on a semiconductor substrate having a gate electrode formed thereon, the interlayer insulating film is formed on the metal interconnection by bias-applied plasma CVD using source gas containing hydrogen atoms, and a silicon oxynitride film is provided in the underlayer of the metal interconnection and the interlayer insulating film.

Abstract translation: 为了阻止通过HDP-CVD等形成层间绝缘膜时产生的氢离子，从而抑制氢离子对器件的不利影响，在包括接触层，金属互连和层间绝缘的半导体器件中 在其上形成有栅电极的半导体衬底上，通过使用含氢原子的气体的偏压施加等离子体CVD在金属互连上形成层间绝缘膜，并且在金属互连的底层设置氮氧化硅膜， 层间绝缘膜。

公开(公告)号：US07875539B2

公开(公告)日：2011-01-25

申请号：US12234079

申请日：2008-09-19

Applicant: Tadashi Yamaguchi ,  Koyu Asai ,  Mahito Sawada ,  Kiyoteru Kobayashi ,  Tatsunori Murata ,  Satoshi Shimizu

Inventor： Tadashi Yamaguchi ,  Koyu Asai ,  Mahito Sawada ,  Kiyoteru Kobayashi ,  Tatsunori Murata ,  Satoshi Shimizu

IPC: H01L21/20

CPC classification number: H01L21/76802 ,  H01L21/76801 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76837 ,  H01L23/53295 ,  H01L23/564 ,  H01L2924/0002 ,  H01L2924/13091 ,  H01L2924/00

Abstract: In order to block hydrogen ions produced when forming an interlayer insulating film by HDP-CVD or the like to thereby suppress an adverse effect of the hydrogen ions on a device, in a semiconductor device including a contact layer, a metal interconnection and an interlayer insulating film on a semiconductor substrate having a gate electrode formed thereon, the interlayer insulating film is formed on the metal interconnection by bias-applied plasma CVD using source gas containing hydrogen atoms, and a silicon oxynitride film is provided in the underlayer of the metal interconnection and the interlayer insulating film.

公开(公告)号：US07759722B2

公开(公告)日：2010-07-20

申请号：US11765703

申请日：2007-06-20

Applicant: Tatsunori Murata ,  Koyu Asai ,  Hiroaki Iuchi

Inventor： Tatsunori Murata ,  Koyu Asai ,  Hiroaki Iuchi

IPC: H01L29/788

CPC classification number: H01L27/115 ,  H01L21/28273 ,  H01L21/7682 ,  H01L21/76834 ,  H01L27/11521 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14643 ,  H01L27/14689 ,  H01L29/42324

Abstract: When microfabrication is done, a reliable semiconductor device is offered.A semiconductor device has a semiconductor substrate which has a main front surface, a plurality of convex patterns formed on the main front surface of a semiconductor substrate so that each might have a floating gate and a control gate, a first insulating film formed so that the upper surface and the side surface of each of a plurality of convex patterns might be covered, and so that width might become large rather than the portion which covers the lower part side surface of a convex pattern in the portion which covers an upper part side surface, and a second insulating film that covers the upper surface and the side surface of the first insulating film so that the cavity between the adjacent convex patterns may be occluded. The position occluded by the second insulating film of a cavity is a position higher than the upper surface of a floating gate, and is a position lower than the upper surface of a control gate.

Abstract translation: 当进行微细加工时，提供可靠的半导体器件。 半导体器件具有半导体衬底，该半导体衬底具有主前表面，多个凸形图案形成在半导体衬底的主表面上，以便可以具有浮置栅极和控制栅极，第一绝缘膜形成为使得 可以覆盖多个凸形图案中的每一个的上表面和侧表面，并且使得宽度可能变大，而不是覆盖覆盖上部侧表面的部分中的凸形图案的下部侧表面的部分 以及覆盖第一绝缘膜的上表面和侧表面的第二绝缘膜，使得相邻凸形图案之间的空腔可能被遮挡。 由空腔的第二绝缘膜封闭的位置是比浮动栅极的上表面高的位置，并且是比控制栅极的上表面低的位置。

公开(公告)号：US20090017614A1

公开(公告)日：2009-01-15

申请号：US12234079

申请日：2008-09-19

Applicant: Tadashi Yamaguchi ,  Koyu Asai ,  Mahito Sawada ,  Kiyoteru Kobayashi ,  Tatsunori Murata ,  Satoshi Shimizu

Inventor： Tadashi Yamaguchi ,  Koyu Asai ,  Mahito Sawada ,  Kiyoteru Kobayashi ,  Tatsunori Murata ,  Satoshi Shimizu

IPC: H01L21/768

CPC classification number: H01L21/76802 ,  H01L21/76801 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76837 ,  H01L23/53295 ,  H01L23/564 ,  H01L2924/0002 ,  H01L2924/13091 ,  H01L2924/00

Abstract: In order to block hydrogen ions produced when forming an interlayer insulating film by HDP-CVD or the like to thereby suppress an adverse effect of the hydrogen ions on a device, in a semiconductor device including a contact layer, a metal interconnection and an interlayer insulating film on a semiconductor substrate having a gate electrode formed thereon, the interlayer insulating film is formed on the metal interconnection by bias-applied plasma CVD using source gas containing hydrogen atoms, and a silicon oxynitride film is provided in the underlayer of the metal interconnection and the interlayer insulating film.

Abstract translation: 为了阻止通过HDP-CVD等形成层间绝缘膜时产生的氢离子，从而抑制氢离子对器件的不利影响，在包括接触层，金属互连和层间绝缘的半导体器件中 在其上形成有栅电极的半导体衬底上，通过使用含氢原子的气体的偏压施加等离子体CVD在金属互连上形成层间绝缘膜，并且在金属互连的底层设置氮氧化硅膜， 层间绝缘膜。