公开(公告)号：US07784575B2

公开(公告)日：2010-08-31

申请号：US11593008

申请日：2006-11-06

Applicant: Tsuyoshi Yamanaka ,  Kazuyuki Kouno ,  Munetoshi Ueno ,  Tadashi Okuda ,  Shinichiro Joe ,  Taiichi Onoyama ,  Terumasa Hidaka ,  Haruhisa Tsuchikawa ,  Ken Ito ,  Kazutaka Adachi

Inventor： Tsuyoshi Yamanaka ,  Kazuyuki Kouno ,  Munetoshi Ueno ,  Tadashi Okuda ,  Shinichiro Joe ,  Taiichi Onoyama ,  Terumasa Hidaka ,  Haruhisa Tsuchikawa ,  Ken Ito ,  Kazutaka Adachi

IPC: B60W10/02

CPC classification number: B60W20/40 ,  B60K6/48 ,  B60L11/14 ,  B60L15/2036 ,  B60L15/2054 ,  B60L2200/26 ,  B60L2240/421 ,  B60L2240/423 ,  B60L2240/441 ,  B60L2240/486 ,  B60L2240/507 ,  B60W10/02 ,  B60W10/06 ,  B60W10/08 ,  B60W20/00 ,  B60W20/10 ,  B60W2710/027 ,  B60W2710/083 ,  B60W2710/105 ,  Y02T10/6221 ,  Y02T10/6286 ,  Y02T10/645 ,  Y02T10/70 ,  Y02T10/7077 ,  Y02T10/72 ,  Y02T10/7275

Abstract: A hybrid vehicle drive control system is configured to perform engine startup when switching from an electric drive mode to a hybrid drive mode, without creating a sense of output torque loss. In particular, a controller selectively controls a first clutch disposed between the engine and the motor/generator and a second clutch disposed between the motor/generator and a drive wheel to switch between an electric drive mode in which the first clutch is released and the second clutch is engaged, and a hybrid drive mode in which both the first and second clutches are engaged. The controller sets the second torque transfer capacity to a value that is more than zero and less than the target motor/generator torque of the motor/generator when switching from the electric drive mode to the hybrid drive mode and when starting the engine.

Abstract translation: 混合动力车辆驱动控制系统被配置为在从电驱动模式切换到混合动力驱动模式时执行发动机起动，而不产生输出扭矩损失的感觉。 特别地，控制器选择性地控制设置在发动机和电动机/发电机之间的第一离合器和设置在电动机/发电机和驱动轮之间的第二离合器，以在第一离合器被释放的电力驱动模式和第二离合器之间切换 离合器接合，以及混合动力驱动模式，其中第一和第二离合器都被接合。 当从电驱动模式切换到混合驱动模式时以及启动发动机时，控制器将第二转矩传递能力设定为大于零且小于电动机/发电机的目标电动机/发电机转矩的值。

公开(公告)号：US20100027344A1

公开(公告)日：2010-02-04

申请号：US12510745

申请日：2009-07-28

Applicant: Reiji MOCHIDA ,  Yasuhiro TOMITA ,  Kazuyuki KOUNO ,  Hoshihide HARUYAMA ,  Masayoshi NAKAYAMA

Inventor： Reiji MOCHIDA ,  Yasuhiro TOMITA ,  Kazuyuki KOUNO ,  Hoshihide HARUYAMA ,  Masayoshi NAKAYAMA

IPC: G11C16/04 ,  G11C7/00 ,  G11C5/14

CPC classification number: G11C16/30 ,  G11C5/147

Abstract: A drain voltage generator circuit includes a first switching element coupled between a first power supply voltage and an output end of the drain voltage generator circuit, a second switching element coupled in parallel to the first switching element and having a smaller current capability than that of the first switching element, and a control circuit for turning ON the second switching element and then the first switching element, and generates a voltage to supply to a drain of a memory cell. A source of the memory cell is set to be floated or grounded by a transistor.

Abstract translation: 漏极电压发生器电路包括耦合在第一电源电压和漏极电压发生器电路的输出端之间的第一开关元件，与第一开关元件并联耦合并具有比第一开关元件小的电流能力的第二开关元件 第一开关元件，以及用于接通第二开关元件然后接通第一开关元件的控制电路，并且产生供给到存储单元的漏极的电压。 存储单元的源极被设置为由晶体管浮置或接地。

公开(公告)号：US20090257293A1

公开(公告)日：2009-10-15

申请号：US12491658

申请日：2009-06-25

Applicant: Kazuyuki KOUNO

Inventor： Kazuyuki KOUNO

IPC: G11C7/22 ,  G11C7/02 ,  G11C7/00

CPC classification number: G11C7/14 ,  G11C7/12 ,  G11C7/18 ,  G11C16/28 ,  G11C2207/002 ,  G11C2207/2254

Abstract: A semiconductor memory device includes a selector line selection circuit for selecting, in a read operation, a selector line for connecting a first main bit line connected to the sense amplifier with a sub-bit line to which the memory cell being read is connected, a selector line for connecting the first main bit line with a sub-bit line of at least one sector different from the sector to which the memory cell being read belongs, a selector line for connecting a second main bit line connected to the sense amplifier with a sub-bit line to which the reference cell is connected, and a selector line for connecting the second main bit line with a sub-bit line of at least one sector different from the sector to which the memory cell being read belongs.

Abstract translation: 一种半导体存储器件，包括选择器线选择电路，用于在读操作中选择用于将连接到读出放大器的第一主位线与被读取的存储器单元连接的子位线连接的选择器线， 用于将第一主位线与与所读取的存储单元所属的扇区不同的至少一个扇区的子位线连接的选择器线，用于将连接到读出放大器的第二主位线与 连接参考单元的子位线，以及用于将第二主位线与与所读取的存储器单元所属的扇区不同的至少一个扇区的子位线连接的选择器线。

公开(公告)号：US07408820B2

公开(公告)日：2008-08-05

申请号：US11641951

申请日：2006-12-20

Applicant: Takafumi Maruyama ,  Kazuyuki Kouno ,  Akifumi Kawahara ,  Yasuhiro Tomita

Inventor： Takafumi Maruyama ,  Kazuyuki Kouno ,  Akifumi Kawahara ,  Yasuhiro Tomita

IPC: G11C11/34

CPC classification number: G11C16/0491 ,  G11C16/28

Abstract: A nonvolatile semiconductor memory of virtual ground array in which a common connection of the sources and a common connection of the drains of nonvolatile memory cells arranged in rows and columns in a memory cell array are used as bit lines, the nonvolatile memory cells including: a reference cell from which a characteristic used as a reference in a differential readout determination operation is obtained; and a neighbor cell at one side of the reference cell, the neighbor cell sharing one of the source and the drain of the reference cell and being connected to a word line which is connected to the reference cell, wherein the nonvolatile semiconductor memory includes a neighbor cell programming circuit to set the neighbor cell to a programmed state when the word line is activated to set the reference cell to a conduction state, the neighbor cell being kept in a non-conduction state during the programmed state.

Abstract translation: 虚拟接地阵列的非易失性半导体存储器用作位线，其中源和存储单元阵列中以列和列排列的非易失性存储单元的漏极的公共连接的公共连接用作位线，非易失性存储单元包括： 获得在差分读出确定操作中用作参考的特性的参考单元; 以及在所述参考小区的一侧的相邻小区，所述相邻小区分享所述参考小区的源和漏极之一并且连接到连接到所述参考小区的字线，其中所述非易失性半导体存储器包括邻居 当字线被激活以将参考单元设置为导通状态时，相邻单元在编程状态期间保持在非导通状态，将相邻单元设置为编程状态。

公开(公告)号：US20070183240A1

公开(公告)日：2007-08-09

申请号：US11641951

申请日：2006-12-20

Applicant: Takafumi Maruyama ,  Kazuyuki Kouno ,  Akifumi Kawahara ,  Yasuhiro Tomita

Inventor： Takafumi Maruyama ,  Kazuyuki Kouno ,  Akifumi Kawahara ,  Yasuhiro Tomita

IPC: G11C7/02

CPC classification number: G11C16/0491 ,  G11C16/28

Abstract: A nonvolatile semiconductor memory of virtual ground array in which a common connection of the sources and a common connection of the drains of nonvolatile memory cells arranged in rows and columns in a memory cell array are used as bit lines, the nonvolatile memory cells including: a reference cell from which a characteristic used as a reference in a differential readout determination operation is obtained; and a neighbor cell at one side of the reference cell, the neighbor cell sharing one of the source and the drain of the reference cell and being connected to a word line which is connected to the reference cell, wherein the nonvolatile semiconductor memory includes a neighbor cell programming circuit to set the neighbor cell to a programmed state when the word line is activated to set the reference cell to a conduction state, the neighbor cell being kept in a non-conduction state during the programmed state.

Abstract translation: 虚拟接地阵列的非易失性半导体存储器用作位线，其中源和存储单元阵列中以列和列排列的非易失性存储单元的漏极的公共连接的公共连接用作位线，非易失性存储单元包括： 获得在差分读出确定操作中用作参考的特性的参考单元; 以及在所述参考小区的一侧的相邻小区，所述相邻小区分享所述参考小区的源和漏极之一并且连接到连接到所述参考小区的字线，其中所述非易失性半导体存储器包括邻居 当字线被激活以将参考单元设置为导通状态时，相邻单元在编程状态期间保持在非导通状态，将相邻单元设置为编程状态。

公开(公告)号：US20060119421A1

公开(公告)日：2006-06-08

申请号：US11272807

申请日：2005-11-15

Applicant: Kazuyuki Kouno ,  Norio Hattori

Inventor： Kazuyuki Kouno ,  Norio Hattori

IPC: G05F1/10

CPC classification number: G05F1/56

Abstract: A regulator circuit includes: a detection circuit, for outputting a feedback voltage in accordance with an output voltage; a reference voltage input section; a feedback voltage input section; an operational amplification circuit, for comparing a reference voltage and the feedback voltage and outputting a voltage as a comparison result; an output circuit, for supplying an output voltage in accordance with the output of the operational amplification circuit; a connection/disconnection circuit, for connecting or disconnecting the output terminal of the detection circuit and the feedback voltage input section; and a voltage setup circuit, for setting for the feedback voltage input section a predetermined voltage. In the standby state, the connection/disconnection circuit disconnects the output terminal of the detection circuit from the feedback voltage input section, and the voltage setup circuit sets a predetermined voltage for the feedback input section.

Abstract translation: 调节器电路包括：检测电路，用于根据输出电压输出反馈电压; 基准电压输入部; 反馈电压输入部; 用于比较参考电压和反馈电压并输出电压作为比较结果的运算放大电路; 输出电路，用于根据所述运算放大电路的输出提供输出电压; 连接/断开电路，用于连接或断开检测电路的输出端和反馈电压输入部分; 以及用于将反馈电压输入部分设定为预定电压的电压设置电路。 在待机状态下，连接/断开电路将检测电路的输出端与反馈电压输入部分断开，并且电压建立电路为反馈输入部分设定预定的电压。

公开(公告)号：US20100027352A1

公开(公告)日：2010-02-04

申请号：US12489870

申请日：2009-06-23

Applicant: Masayoshi NAKAYAMA ,  Kazuyuki Kouno ,  Reiji Mochida ,  Hoshihide Haruyama

Inventor： Masayoshi NAKAYAMA ,  Kazuyuki Kouno ,  Reiji Mochida ,  Hoshihide Haruyama

IPC: G11C16/04

CPC classification number: G11C16/16 ,  G11C16/344 ,  G11C16/3445

Abstract: In a non-volatile semiconductor memory device, variations in voltage applied to a bit line when an erase voltage applying step is repeatedly executed are suppressed, thereby reducing variations in Vt after erasure. A memory array includes memory cells arranged in an array, a plurality of word lines, and a plurality of bit lines and main bit lines. The memory array also includes a usable region which can store data and an isolation region which cannot store data. Each bit line provided in the usable region is connected via a select transistor to the corresponding main bit line. At least one main bit line is connected not only to a bit line of the usable region, but also to a bit line of the isolation region via a select transistor.

Abstract translation: 在非易失性半导体存储器件中，抑制了当擦除电压施加步骤被重复执行时施加到位线的电压变化，从而减少了擦除后Vt的变化。 存储器阵列包括以阵列布置的存储器单元，多个字线以及多个位线和主位线。 存储器阵列还包括可存储数据的可用区域和不能存储数据的隔离区域。 提供在可用区域中的每个位线通过选择晶体管连接到相应的主位线。 至少一个主位线不仅连接到可用区域的位线，而且还经由选择晶体管连接到隔离区域的位线。

公开(公告)号：US20080228363A1

公开(公告)日：2008-09-18

申请号：US12034268

申请日：2008-02-20

Applicant: Kazuyuki Kouno ,  Tomoyuki Kodawara

Inventor： Kazuyuki Kouno ,  Tomoyuki Kodawara

IPC: G06F17/00

CPC classification number: B60W10/11 ,  B60K6/48 ,  B60L11/14 ,  B60L2240/421 ,  B60L2240/423 ,  B60L2240/486 ,  B60W10/06 ,  B60W10/08 ,  B60W20/30 ,  B60W30/192 ,  B60W2510/081 ,  B60W2510/1005 ,  B60W2520/10 ,  B60W2540/10 ,  B60W2540/106 ,  B60W2710/083 ,  Y02T10/48 ,  Y02T10/6221 ,  Y02T10/6286 ,  Y02T10/642 ,  Y02T10/70 ,  Y02T10/7077 ,  Y10T477/26 ,  Y10T477/79

Abstract: An engine start control system for starting the engine of a hybrid vehicle operated in an EV drive mode. The system responds quickly to an acceleration request while limiting unpleasant deceleration sensations. The hybrid vehicle has a first clutch disposed between the engine and motor/generator. An electric drive mode exists in which the first clutch is disengaged and the driving torque is provided only by the motor/generator, and a hybrid drive mode exists in which the first clutch is engaged and the driving torque is provided by both the engine and motor/generator. The system uses an engine start shift pattern that is high-geared as compared with a normal shift pattern. Shift control of the transmission is performed using the engine start shift pattern when an engine start request arises. The engine is started by controlling the engagement of the first clutch after performing the shift control.

Abstract translation: 一种用于启动以EV驱动模式操作的混合动力车辆的发动机的发动机起动控制系统。 系统快速响应加速请求，同时限制令人不快的减速感。 混合动力车辆具有设置在发动机和马达/发电机之间的第一离合器。 存在电动驱动模式，其中第一离合器分离并且仅由电动机/发电机提供驱动转矩，并且存在混合动力模式，其中第一离合器接合并且由发动机和电动机都提供驱动转矩 /发电机。 该系统使用与正常换档模式相比较高齿轮的发动机起动换档模式。 当发动机启动请求出现时，使用发动机起动换档模式进行变速器的换档控制。 通过在执行换档控制之后控制第一离合器的接合来启动发动机。

公开(公告)号：US20080037336A1

公开(公告)日：2008-02-14

申请号：US11889130

申请日：2007-08-09

Applicant: Kazuyuki Kouno

Inventor： Kazuyuki Kouno

IPC: G11C7/00 ,  G11C8/00

CPC classification number: G11C7/14 ,  G11C7/12 ,  G11C7/18 ,  G11C16/28 ,  G11C2207/002 ,  G11C2207/2254

Abstract: A semiconductor memory device includes a selector line selection circuit for selecting, in a read operation, a selector line for connecting a first main bit line connected to the sense amplifier with a sub-bit line to which the memory cell being read is connected, a selector line for connecting the first main bit line with a sub-bit line of at least one sector different from the sector to which the memory cell being read belongs, a selector line for connecting a second main bit line connected to the sense amplifier with a sub-bit line to which the reference cell is connected, and a selector line for connecting the second main bit line with a sub-bit line of at least one sector different from the sector to which the memory cell being read belongs.

Abstract translation: 一种半导体存储器件，包括选择器线选择电路，用于在读操作中选择用于将连接到读出放大器的第一主位线与被读取的存储器单元连接的子位线连接的选择器线， 用于将第一主位线与与所读取的存储单元所属的扇区不同的至少一个扇区的子位线连接的选择器线，用于将连接到读出放大器的第二主位线与 连接参考单元的子位线，以及用于将第二主位线与与所读取的存储器单元所属的扇区不同的至少一个扇区的子位线连接的选择器线。

公开(公告)号：US20070275818A1

公开(公告)日：2007-11-29

申请号：US11752376

申请日：2007-05-23

Applicant: Kazuyuki Kouno

Inventor： Kazuyuki Kouno

IPC: B60K1/02

CPC classification number: B60W20/40 ,  B60K6/48 ,  B60L7/26 ,  B60L11/14 ,  B60L15/2054 ,  B60L2240/423 ,  B60L2240/486 ,  B60W10/02 ,  B60W10/06 ,  B60W10/08 ,  B60W20/00 ,  B60W2510/0657 ,  B60W2510/083 ,  B60W2710/027 ,  Y02T10/6221 ,  Y02T10/6286 ,  Y02T10/645 ,  Y02T10/70 ,  Y02T10/7077 ,  Y02T10/72 ,  Y02T10/7275 ,  Y10T477/23 ,  Y10T477/26 ,  Y10T477/71

Abstract: A hybrid-vehicle engine start controlling apparatus includes an engine, a motor connected to a vehicle driving shaft, a first engaging element provided between the engine and the motor for connecting and disconnecting the engine and the motor and engine start control means. The engine start controlling means is configured to start the engine by increasing a driving torque of the motor and increasing a transmission torque capacity of the first engaging element so as to increase a rotation speed of the engine by the driving torque of the motor in a state in which the engine is stopped and the first engaging element is released. The engine start controlling means includes a first engaging phase for increasing the transmission torque capacity of the first engaging element at a first velocity, and a second engaging phase for changing the transmission torque capacity at a second velocity lower than the first velocity.

Abstract translation: 混合车辆发动机起动控制装置包括发动机，连接到车辆驱动轴的电动机，设置在发动机和电动机之间的用于连接和断开发动机和电动机的发动机起动控制装置的第一接合元件。 发动机起动控制装置构成为通过增大电动机的驱动转矩并增大第一接合元件的传递转矩容量来起动发动机，从而通过电动机的驱动转矩在一个状态下增加发动机的转速 其中发动机停止并且第一接合元件被释放。 发动机起动控制装置包括用于以第一速度增加第一接合元件的传递扭矩能力的第一接合相和用于以低于第一速度的第二速度改变传动扭矩容量的第二接合相。