公开(公告)号：US20080111598A1

公开(公告)日：2008-05-15

申请号：US11926704

申请日：2007-10-29

申请人： Hiroshi YANAGIGAWA ,  Masayuki IDA ,  Kazunori DOI

发明人： Hiroshi YANAGIGAWA ,  Masayuki IDA ,  Kazunori DOI

IPC分类号： H03L7/06

CPC分类号： G11C5/145 ,  H02M3/073

摘要： A charge pump circuit is provided with a capacitor for generating a boosted voltage from a power supply voltage in response to a clock signal; and an output node from which the boosted voltage is externally outputted. The capacitor includes a first well formed within a substrate, a second well formed within the first well, first and second diffusion regions formed within the second well to receive the clock signal, a channel region provided between the first and second diffusion regions in which channel region a channel is formed in response to the clock signal; and an electrode positioned over the channel region across a dielectric and connected with the output node. The output node is also connected with the first well to apply said boosted voltage to the first well.

摘要翻译： 电荷泵电路设置有电容器，用于响应于时钟信号从电源电压产生升压电压; 以及从外部输出升压电压的输出节点。 电容器包括形成在衬底内的第一阱，形成在第一阱内的第二阱，形成在第二阱内以接收时钟信号的第一和第二扩散区，设置在第一和第二扩散区之间的沟道区， 区域响应于时钟信号形成通道; 以及电极，其位于所述沟道区域上方跨越电介质并与所述输出节点连接。 输出节点也与第一阱连接，以将所述升压电压施加到第一阱。

公开(公告)号：US20080272753A1

公开(公告)日：2008-11-06

申请号：US12113496

申请日：2008-05-01

申请人： Shinji KAWASHIMA ,  Kazunori Doi

发明人： Shinji KAWASHIMA ,  Kazunori Doi

IPC分类号： G05F1/573

CPC分类号： G05F1/573

摘要： A stabilized regulator circuit is provided A first Pch transistor (PTr) (P1) whose source is connected to a power supply line and whose drain is connected to an output terminal that outputs a load current, a PTr (P2) whose source and gate are respectively connected to the source and gate of the PTr (P1), resistor elements connected in series between the output terminal and ground, a resistor element (R3) connected between a drain of P2 and ground, and an amplifier which controls P1 and P2 based on a difference between potential of a connection point of the resistor elements and a reference. A comparator, with a differential amplifier input stage configured by an Nch transistor, compares potential difference between two ends of R3 and potential difference between the connection point of the resistor elements and ground, and when the former is larger, controls P1 so as to limit load current.

摘要翻译： 提供了一种稳定稳压器电路，其源极连接到电源线并且其漏极连接到输出负载电流的输出端的第一Pch晶体管（P 1）（P 1），其源极和 门分别连接到PTr（P 1）的源极和栅极，串联连接在输出端子和地之间的电阻元件，连接在P 2的漏极和地之间的电阻元件（R 3）和放大器 基于电阻元件的连接点的电位与参考电压的差来控制P 1和P 2。 具有由Nch晶体管构成的差分放大器输入级的比较器比较R 3的两端之间的电位差和电阻元件与地的连接点之间的电位差，当前者较大时，控制P 1，使 限制负载电流。

公开(公告)号：US07683687B2

公开(公告)日：2010-03-23

申请号：US11979697

申请日：2007-11-07

申请人： Shinji Kawashima ,  Kazunori Doi

发明人： Shinji Kawashima ,  Kazunori Doi

IPC分类号： H03K3/00

CPC分类号： H03K3/3565

摘要： In a hysteresis characteristic input circuit, first and second resistors are connected in parallel between a first power supply terminal and a connection point, and first and second MOS transistors are connected in parallel between the connection point and a second power supply terminal and are controlled by an input voltage. An inverter has an input connected to the connection point and an output adapted to generate an output voltage. A first switching element is connected in series to the second resistor, and a second switching element is connected in series to the second MOS transistor. The first and second switching elements are complementarily controlled by the output voltage.

摘要翻译： 在滞后特性输入电路中，第一和第二电阻并联连接在第一电源端子和连接点之间，第一和第二MOS晶体管并联连接在连接点和第二电源端子之间，并由 输入电压。 逆变器具有连接到连接点的输入端和适于产生输出电压的输出端。 第一开关元件串联连接到第二电阻器，第二开关元件串联连接到第二MOS晶体管。 第一和第二开关元件由输出电压互补地控制。

公开(公告)号：US07923978B2

公开(公告)日：2011-04-12

申请号：US12113496

申请日：2008-05-01

申请人： Shinji Kawashima ,  Kazunori Doi

发明人： Shinji Kawashima ,  Kazunori Doi

IPC分类号： G05F1/573

CPC分类号： G05F1/573

摘要： A stabilized regulator circuit is provided A first Pch transistor (PTr) (P1) whose source is connected to a power supply line and whose drain is connected to an output terminal that outputs a load current, a PTr (P2) whose source and gate are respectively connected to the source and gate of the PTr (P1), resistor elements connected in series between the output terminal and ground, a resistor element (R3) connected between a drain of P2 and ground, and an amplifier which controls P1 and P2 based on a difference between potential of a connection point of the resistor elements and a reference. A comparator, with a differential amplifier input stage configured by an Nch transistor, compares potential difference between two ends of R3 and potential difference between the connection point of the resistor elements and ground, and when the former is larger, controls P1 so as to limit load current.

摘要翻译： 提供稳定的调节器电路源极连接到电源线并且其漏极连接到输出负载电流的输出端的第一Pch晶体管（PTr）（P1），源极和栅极的PTr（P2） 分别连接到PTr（P1）的源极和栅极，串联连接在输出端子和地之间的电阻元件，连接在P2和地的漏极之间的电阻元件（R3）和控制P1和P2的放大器 关于电阻元件的连接点的电位和参考电压之间的差异。 具有由Nch晶体管构成的差分放大器输入级的比较器比较R3的两端之间的电位差和电阻元件与地的连接点之间的电位差，当前者较大时，控制P1以限制 负载电流。

公开(公告)号：US07439795B2

公开(公告)日：2008-10-21

申请号：US11926704

申请日：2007-10-29

申请人： Hiroshi Yanagigawa ,  Masayuki Ida ,  Kazunori Doi

发明人： Hiroshi Yanagigawa ,  Masayuki Ida ,  Kazunori Doi

IPC分类号： G05F3/16 ,  H02M3/04 ,  H02M3/07

CPC分类号： G11C5/145 ,  H02M3/073

摘要： A charge pump circuit is provided with a capacitor for generating a boosted voltage from a power supply voltage in response to a clock signal; and an output node from which the boosted voltage is externally outputted. The capacitor includes a first well formed within a substrate, a second well formed within the first well, first and second diffusion regions formed within the second well to receive the clock signal, a channel region provided between the first and second diffusion regions in which channel region a channel is formed in response to the clock signal; and an electrode positioned over the channel region across a dielectric and connected with the output node. The output node is also connected with the first well to apply said boosted voltage to the first well.

摘要翻译： 电荷泵电路设置有电容器，用于响应于时钟信号从电源电压产生升压电压; 以及从外部输出升压电压的输出节点。 电容器包括形成在衬底内的第一阱，形成在第一阱内的第二阱，形成在第二阱内以接收时钟信号的第一和第二扩散区，设置在第一和第二扩散区之间的沟道区， 区域响应于时钟信号形成通道; 以及电极，其位于所述沟道区域上方跨越电介质并与所述输出节点连接。 输出节点也与第一阱连接，以将所述升压电压施加到第一阱。

公开(公告)号：US20080204101A1

公开(公告)日：2008-08-28

申请号：US11979697

申请日：2007-11-07

申请人： Shinji Kawashima ,  Kazunori Doi

发明人： Shinji Kawashima ,  Kazunori Doi

IPC分类号： H03K3/3565 ,  H03K3/00

CPC分类号： H03K3/3565

摘要： In a hysteresis characteristic input circuit, first and second resistors are connected in parallel between a first power supply terminal and a connection point, and first and second MOS transistors are connected in parallel between the connection point and a second power supply terminal and are controlled by an input voltage. An inverter has an input connected to the connection point and an output adapted to generate an output voltage. A first switching element is connected in series to the second resistor, and a second switching element is connected in series to the second MOS transistor. The first and second switching elements are complementarily controlled by the output voltage.

摘要翻译： 在滞后特性输入电路中，第一和第二电阻并联连接在第一电源端子和连接点之间，第一和第二MOS晶体管并联连接在连接点和第二电源端子之间，并由 输入电压。 逆变器具有连接到连接点的输入端和适于产生输出电压的输出端。 第一开关元件串联连接到第二电阻器，第二开关元件串联连接到第二MOS晶体管。 第一和第二开关元件由输出电压互补地控制。