发明申请
US20080111598A1 CHARGE PUMP CIRCUIT WITH REDUCED PARASITIC CAPACITANCE 失效
充电泵电路具有降低的PARASITIC电容

CHARGE PUMP CIRCUIT WITH REDUCED PARASITIC CAPACITANCE
摘要:
A charge pump circuit is provided with a capacitor for generating a boosted voltage from a power supply voltage in response to a clock signal; and an output node from which the boosted voltage is externally outputted. The capacitor includes a first well formed within a substrate, a second well formed within the first well, first and second diffusion regions formed within the second well to receive the clock signal, a channel region provided between the first and second diffusion regions in which channel region a channel is formed in response to the clock signal; and an electrode positioned over the channel region across a dielectric and connected with the output node. The output node is also connected with the first well to apply said boosted voltage to the first well.
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