公开(公告)号：US20060154460A1

公开(公告)日：2006-07-13

申请号：US11293126

申请日：2005-12-05

Applicant: Serah Yun ,  Changki Hong ,  Jaedong Lee ,  Juseon Goo ,  Youngok Kim ,  Jeongheon Park ,  Joonsang Park ,  Keunhee Bai ,  Myoungho Jung

Inventor： Serah Yun ,  Changki Hong ,  Jaedong Lee ,  Juseon Goo ,  Youngok Kim ,  Jeongheon Park ,  Joonsang Park ,  Keunhee Bai ,  Myoungho Jung

IPC: H01L21/4763

CPC classification number: H01L21/76897

Abstract: In one aspect, a self-aligned contact method is provided in which a substrate having a plurality of structures are spaced apart over a surface of the substrate, and a sacrificial film is deposited over and between the plurality of structures, where a material of the sacrificial film has a given withstand temperature. The sacrificial film is patterned to expose a portion of the substrate adjacent the plurality of structures. An insulating layer is deposited over the sacrificial film and the exposed portion of the substrate, where the depositing of the insulating layer includes a heat treatment at a temperature which is less than the withstand temperature of the sacrificial film material. The insulating layer is planarized to expose the sacrificial film, and the sacrificial film is removed to expose respective areas between the plurality of structures. The respective areas between the plurality of structures are filled with a conductive material.

Abstract translation: 在一个方面，提供一种自对准接触方法，其中具有多个结构的衬底在衬底的表面上间隔开，并且牺牲膜沉积在多个结构之间并且在多个结构之间，其中， 牺牲膜具有给定的耐受温度。 牺牲膜被图案化以暴露与多个结构相邻的衬底的一部分。 绝缘层沉积在牺牲膜和衬底的暴露部分上，其中绝缘层的沉积包括在小于牺牲膜材料的耐受温度的温度下的热处理。 平面化绝缘层以暴露牺牲膜，并且去除牺牲膜以暴露多个结构之间的相应区域。 多个结构之间的各个区域填充有导电材料。

公开(公告)号：US20060094243A1

公开(公告)日：2006-05-04

申请号：US11298785

申请日：2005-12-09

Applicant: Eunkee Hong ,  Kyutae Na ,  Juseon Goo ,  Hong Kim

Inventor： Eunkee Hong ,  Kyutae Na ,  Juseon Goo ,  Hong Kim

IPC: H01L21/311

CPC classification number: H01L21/76837 ,  C08L83/16 ,  H01L21/02164 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/3125 ,  H01L21/316 ,  H01L21/31695 ,  H01L21/76232 ,  H01L21/76802 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/823475 ,  H01L21/823481

Abstract: Compositions that can be used in semiconductor manufacturing processes, comprising perhydro-polysilazane having a weight average molecular weight of about 300 to about 3,000 and a polydispersity index of about 1.8 to about 3.0 are provided. Solutions comprising the compositions of the present invention, methods of forming films in a semiconductor manufacturing process, and methods of manufacturing semiconductor devices are also provided.

公开(公告)号：US20100230741A1

公开(公告)日：2010-09-16

申请号：US12711033

申请日：2010-02-23

Applicant: Jongwan Choi ,  Eunkee Hong ,  Bo-Young Lee ,  Tae-Jong Han ,  Juseon Goo ,  Kyungmun Byun

Inventor： Jongwan Choi ,  Eunkee Hong ,  Bo-Young Lee ,  Tae-Jong Han ,  Juseon Goo ,  Kyungmun Byun

IPC: H01L29/792 ,  H01L29/06

CPC classification number: H01L29/7881 ,  H01L21/76229 ,  H01L21/764 ,  H01L27/11521 ,  H01L27/11531 ,  H01L27/11568 ,  H01L29/0649

Abstract: A tunnel insulating layer and a charge storage layer are sequentially stacked on a substrate. A recess region penetrates the charge storage layer, the tunnel insulating layer and a portion of the substrate. The recess region is defined by a bottom surface and a side surface extending from the bottom surface. A first dielectric pattern includes a bottom portion covering the bottom surface and inner walls extending from the bottom portion and covering a portion of the side surface of the recess region. A second dielectric pattern is in the recess region between the inner walls of the first dielectric pattern, and the second dielectric pattern enclosing an air gap. The air gap that is enclosed by the second dielectric pattern may extend through a major portion of the second dielectric pattern in a direction away from the bottom surface of the recess region.

Abstract translation: 隧道绝缘层和电荷存储层依次层叠在基板上。 凹陷区域穿透电荷存储层，隧道绝缘层和基底的一部分。 凹陷区域由底表面和从底表面延伸的侧表面限定。 第一电介质图案包括覆盖底面的底部和从底部延伸并覆盖凹部区域的侧表面的一部分的内壁。 第二电介质图案位于第一电介质图案的内壁之间的凹陷区域中，并且第二电介质图案包围气隙。 由第二电介质图案包围的空气间隙可以沿着远离凹部区域的底表面的方向延伸穿过第二电介质图案的主要部分。

公开(公告)号：US20050130439A1

公开(公告)日：2005-06-16

申请号：US11010223

申请日：2004-12-10

Applicant: Juseon Goo ,  Eunkee Hong ,  Hong-Gun Kim ,  Kyu-Tae Na

Inventor： Juseon Goo ,  Eunkee Hong ,  Hong-Gun Kim ,  Kyu-Tae Na

IPC: H01L21/31 ,  H01L21/316 ,  H01L21/60 ,  H01L21/768 ,  H01L21/4763 ,  H01L21/469

CPC classification number: H01L21/02164 ,  H01L21/02175 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02318 ,  H01L21/316 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76837 ,  H01L21/76897

Abstract: Methods of forming an insulating layer in a semiconductor device are provided in which a metal oxide layer is formed on a semiconductor structure that includes a plurality of gap regions thereon. A spin-on-glass layer is formed on the metal oxide layer, and then the semiconductor structure is heated to a temperature of at least about 400° C. The spin-on-glass layer may comprise a siloxane-based material, a silanol-based material or a silazane-based material.

Abstract translation: 提供了在半导体器件中形成绝缘层的方法，其中在其上包括多个间隙区域的半导体结构上形成金属氧化物层。 在金属氧化物层上形成旋涂玻璃层，然后将半导体结构加热到至少约400℃的温度。旋涂玻璃层可以包括基于硅氧烷的材料，硅烷醇 的材料或硅氮烷基材料。

公开(公告)号：US07585786B2

公开(公告)日：2009-09-08

申请号：US11010223

申请日：2004-12-10

Applicant: Juseon Goo ,  Eunkee Hong ,  Hong-Gun Kim ,  Kyu-Tae Na

Inventor： Juseon Goo ,  Eunkee Hong ,  Hong-Gun Kim ,  Kyu-Tae Na

IPC: H01L21/31

CPC classification number: H01L21/02164 ,  H01L21/02175 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02318 ,  H01L21/316 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76837 ,  H01L21/76897

Abstract: Methods of forming an insulating layer in a semiconductor device are provided in which a metal oxide layer is formed on a semiconductor structure that includes a plurality of gap regions thereon. A spin-on-glass layer is formed on the metal oxide layer, and then the semiconductor structure is heated to a temperature of at least about 400° C. The spin-on-glass layer may comprise a siloxane-based material, a silanol-based material or a silazane-based material.

Abstract translation: 提供了在半导体器件中形成绝缘层的方法，其中在其上包括多个间隙区域的半导体结构上形成金属氧化物层。 在金属氧化物层上形成旋涂玻璃层，然后将半导体结构加热到至少约400℃的温度。旋涂玻璃层可以包括基于硅氧烷的材料，硅烷醇 的材料或硅氮烷基材料。

公开(公告)号：US07429637B2

公开(公告)日：2008-09-30

申请号：US11298785

申请日：2005-12-09

Applicant: Eunkee Hong ,  Kyutae Na ,  Juseon Goo ,  Hong Gun Kim

Inventor： Eunkee Hong ,  Kyutae Na ,  Juseon Goo ,  Hong Gun Kim

IPC: C08G77/12

CPC classification number: H01L21/76837 ,  C08L83/16 ,  H01L21/02164 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/3125 ,  H01L21/316 ,  H01L21/31695 ,  H01L21/76232 ,  H01L21/76802 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/823475 ,  H01L21/823481

Abstract: Compositions that can be used in semiconductor manufacturing processes, comprising perhydro-polysilazane having a weight average molecular weight of about 300 to about 3,000 and a polydispersity index of about 1.8 to about 3.0 are provided. Solutions comprising the compositions of the present invention, methods of forming films in a semiconductor manufacturing process, and methods of manufacturing semiconductor devices are also provided.

Abstract translation: 可用于半导体制造方法的组合物包括重均分子量为约300至约3,000，多分散指数为约1.8至约3.0的全氢化硅氮烷。 还提供了包含本发明组合物的方法，半导体制造工艺中形成膜的方法以及制造半导体器件的方法。

公开(公告)号：US07015144B2

公开(公告)日：2006-03-21

申请号：US10776823

申请日：2004-02-11

Applicant: Eunkee Hong ,  Kyutae Na ,  Juseon Goo ,  Hong Gun Kim

Inventor： Eunkee Hong ,  Kyutae Na ,  Juseon Goo ,  Hong Gun Kim

IPC: H01L21/311 ,  H01L21/31 ,  H01L21/469

CPC classification number: H01L21/76837 ,  C08L83/16 ,  H01L21/02164 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/3125 ,  H01L21/316 ,  H01L21/31695 ,  H01L21/76232 ,  H01L21/76802 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/823475 ,  H01L21/823481

Abstract: Compositions that can be used in semiconductor manufacturing processes, comprising perhydro-polysilazane having a weight average molecular weight of about 300 to about 3,000 and a polydispersity index of about 1.8 to about 3.0 are provided. Solutions comprising the compositions of the present invention, methods of forming films in a semiconductor manufacturing process, and methods of manufacturing semiconductor devices are also provided.

Abstract translation: 可用于半导体制造方法的组合物包括重均分子量为约300至约3,000，多分散指数为约1.8至约3.0的全氢化硅氮烷。 还提供了包含本发明组合物的方法，半导体制造工艺中形成膜的方法以及制造半导体器件的方法。