公开(公告)号：US20140127862A1

公开(公告)日：2014-05-08

申请号：US14155309

申请日：2014-01-14

Applicant: Junhua Luo ,  Jinzhong Yao ,  Baoguan Yin

Inventor： Junhua Luo ,  Jinzhong Yao ,  Baoguan Yin

IPC: H01L21/56

CPC classification number: H01L21/561 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: Semiconductor dies are mounted on a heat sink array frame structure. The heat sink array frame structure and the semiconductor dies are assembled together with an insulating substrate that has a corresponding array of apertures on an adhesive tape. The semiconductor dies are connected electrically with electrical contacts on the insulating substrate. The semiconductor dies, heat sinks and electrical connections to the contacts are encapsulated with a mold compound and then the encapsulated array is de-taped and singulated.

Abstract translation: 半导体管芯安装在散热片阵列框架结构上。 散热器阵列框架结构和半导体管芯与绝缘基板组装在一起，绝缘基板在胶带上具有相应的孔阵列。 半导体管芯与绝缘基板上的电触点电连接。 半导体管芯，散热器和与触点的电气连接用模具化合物封装，然后封装的阵列被去磁和分离。

公开(公告)号：US08722465B1

公开(公告)日：2014-05-13

申请号：US14155309

申请日：2014-01-14

Applicant: Junhua Luo ,  Jinzhong Yao ,  Baoguan Yin

Inventor： Junhua Luo ,  Jinzhong Yao ,  Baoguan Yin

IPC: H01L21/00

CPC classification number: H01L21/561 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: Semiconductor dies are mounted on a heat sink array frame structure. The heat sink array frame structure and the semiconductor dies are assembled together with an insulating substrate that has a corresponding array of apertures on an adhesive tape. The semiconductor dies are connected electrically with electrical contacts on the insulating substrate. The semiconductor dies, heat sinks and electrical connections to the contacts are encapsulated with a mold compound and then the encapsulated array is de-taped and singulated.

公开(公告)号：US20140027896A1

公开(公告)日：2014-01-30

申请号：US13681437

申请日：2012-11-20

Applicant: Baoguan Yin ,  Junhua Luo ,  Deguo Sun

Inventor： Baoguan Yin ,  Junhua Luo ,  Deguo Sun

IPC: H01L23/49 ,  H01L21/56

CPC classification number: H01L23/49575 ,  H01L21/56 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49 ,  H01L23/49537 ,  H01L23/49541 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/97 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method of assembling a semiconductor device includes providing a substrate having an array of substrate elements linked by substrate corner elements and separated by slots extending between the corner elements. Semiconductor dies are positioned on the substrate elements. A cap, frame and contact structure is provided that has a corresponding array of caps supported by corner legs linking the caps to frame corner elements, frame elements linking the frame corner elements, and sets of electrical contact elements supported by the frame elements. The cap, frame and contact structure is fitted on the substrate with the caps extending over corresponding dies, the frame corner elements extending over the substrate corner elements, and the sets of electrical contact elements disposed in the slots. The dies are connected electrically with the electrical contact elements and the assembly is encapsulated and singulated. Singulating removes the frame elements.

Abstract translation: 一种组装半导体器件的方法包括提供具有由衬底角元件连接的衬底元件阵列并由角部元件之间延伸的槽分隔的衬底。 半导体管芯位于衬底元件上。 提供了一种帽，框架和接触结构，其具有相应的帽子阵列，所述帽子由将帽子连接到框架角元件，连接框架角元件的框架元件以及由框架元件支撑的一组电接触元件的角部支腿支撑。 盖，框架和接触结构安装在基板上，盖子延伸在对应的模具上，框架角元件延伸在基板角元件上，并且设置在槽中的电接触元件组。 模具与电接触元件电连接并且组件被封装和分割。 Singulating移除框架元素。

公开(公告)号：US08481369B2

公开(公告)日：2013-07-09

申请号：US13004028

申请日：2011-01-11

Applicant: Junhua Luo ,  Xingshou Pang ,  Jinzhong Yao

Inventor： Junhua Luo ,  Xingshou Pang ,  Jinzhong Yao

IPC: H01L21/56

CPC classification number: H01L21/56 ,  H01L21/568 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00

Abstract: A no-lead type semiconductor package is formed by attaching a die to a top surface of a flag of a lead frame and then taping a bottom surface of the flag and leads of the lead frame. Die bonding pads are connected to the leads with wires and then the assembly is put in a mold chase and encapsulated with a plastic material. The mold chase has protrusions between the flag and the leads of a lead frame, and between the leads themselves, which causes indentations to be formed between the leads and between the flag and the leads. The method is particularly useful for making quad flat no lead (QFN) devices and power-QFN type devices.

Abstract translation: 无引线型半导体封装通过将管芯附接到引线框架的标志的顶表面，然后贴合引线框架的标志和引线的底表面而形成。 芯片焊盘通过导线连接到引线，然后将组件放入模具中并用塑料材料封装。 模具追踪在引线框架的标志和引线之间以及引线本身之间具有突起，这导致引线之间以及引脚之间形成凹痕。 该方法对于制造四边形无铅（QFN）器件和功率QFN型器件特别有用。

公开(公告)号：US20120264258A1

公开(公告)日：2012-10-18

申请号：US13442878

申请日：2012-04-10

Applicant: Junhua LUO ,  Jinzhong Yao ,  Baoguan Yin

Inventor： Junhua LUO ,  Jinzhong Yao ,  Baoguan Yin

IPC: H01L21/78

CPC classification number: H01L21/561 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: Semiconductor dies are mounted on a heat sink array frame structure. The heat sink array frame structure and the semiconductor dies are assembled together with an insulating substrate that has a corresponding array of apertures on an adhesive tape. The semiconductor dies are connected electrically with electrical contacts on the insulating substrate. The semiconductor dies, heat sinks and electrical connections to the contacts are encapsulated with a mold compound and then the encapsulated array is de-taped and singulated.

Abstract translation: 半导体管芯安装在散热片阵列框架结构上。 散热器阵列框架结构和半导体管芯与绝缘基板组装在一起，绝缘基板在胶带上具有相应的孔阵列。 半导体管芯与绝缘基板上的电触点电连接。 半导体管芯，散热器和与触点的电气连接用模具化合物封装，然后封装的阵列被去磁和分离。

公开(公告)号：US20110189823A1

公开(公告)日：2011-08-04

申请号：US13004028

申请日：2011-01-11

Applicant: Junhua Luo ,  Xingshou Pang ,  Jinzhong Yao

Inventor： Junhua Luo ,  Xingshou Pang ,  Jinzhong Yao

IPC: H01L21/56

CPC classification number: H01L21/56 ,  H01L21/568 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00

Abstract: A no-lead type semiconductor package is formed by attaching a die to a top surface of a flag of a lead frame and then taping a bottom surface of the flag and leads of the lead frame. Die bonding pads are connected to the leads with wires and then the assembly is put in a mold chase and encapsulated with a plastic material. The mold chase has protrusions between the flag and the leads of a lead frame, and between the leads themselves, which causes indentations to be formed between the leads and between the flag and the leads. The method is particularly useful for making quad flat no lead (QFN) devices and power-QFN type devices.

Abstract translation: 无引线型半导体封装通过将管芯附接到引线框架的标志的顶表面，然后贴合引线框架的标记和引线的底表面而形成。 芯片焊盘通过导线连接到引线，然后将组件放入模具中并用塑料材料封装。 模具追踪在引线框架的标志和引线之间以及引线本身之间具有突起，这导致引线之间以及引脚之间形成凹痕。 该方法对于制造四边形无铅（QFN）器件和功率QFN型器件特别有用。

公开(公告)号：US20100283135A1

公开(公告)日：2010-11-11

申请号：US12753118

申请日：2010-04-02

Applicant: Jinzhong YAO ,  Zhigang Bai ,  Junhua Luo ,  Meijiang Song ,  Hong Zhu

Inventor： Jinzhong YAO ,  Zhigang Bai ,  Junhua Luo ,  Meijiang Song ,  Hong Zhu

IPC: H01L23/495 ,  H01L23/00

CPC classification number: H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06165 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A lead frame including a lead frame structure having a die support area and a plurality of electrical contact areas has shallow recesses formed on a surface of the lead frame structure.

Abstract translation: 包括具有管芯支撑区域和多个电接触区域的引线框架结构的引线框架具有形成在引线框架结构的表面上的浅凹槽。

公开(公告)号：US20140357023A1

公开(公告)日：2014-12-04

申请号：US14459331

申请日：2014-08-14

Applicant: Baoguan Yin ,  Junhua Luo ,  Deguo Sun

Inventor： Baoguan Yin ,  Junhua Luo ,  Deguo Sun

IPC: H01L23/495 ,  H01L21/78

CPC classification number: H01L23/49575 ,  H01L21/56 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49 ,  H01L23/49537 ,  H01L23/49541 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/97 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method of assembling a semiconductor device includes providing a substrate having an array of substrate elements linked by substrate corner elements and separated by slots extending between the corner elements. Semiconductor dies are positioned on the substrate elements. A cap, frame and contact structure is provided that has a corresponding array of caps supported by corner legs linking the caps to frame corner elements, frame elements linking the frame corner elements, and sets of electrical contact elements supported by the frame elements. The cap, frame and contact structure is fitted on the substrate with the caps extending over corresponding dies, the frame corner elements extending over the substrate corner elements, and the sets of electrical contact elements disposed in the slots. The dies are connected electrically with the electrical contact elements and the assembly is encapsulated and singulated. Singulating removes the frame elements.

公开(公告)号：US20130037966A1

公开(公告)日：2013-02-14

申请号：US13495011

申请日：2012-06-13

Applicant: Shunan QIU ,  Guoliang Gong ,  Junhua Luo ,  Xuesong Xu

Inventor： Shunan QIU ,  Guoliang Gong ,  Junhua Luo ,  Xuesong Xu

IPC: H01L23/48 ,  H01L21/78

CPC classification number: H01L29/0657 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/544 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2224/03009 ,  H01L2224/04042 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/10155 ,  H01L2924/10156 ,  H01L2924/10158 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A semiconductor device includes a semiconductor die having first and second opposing faces and an edge surface. The edge surface has an undercut under the first face. The second face of the semiconductor die is bonded to a bonding surface of a die support member, such as a thermally conductive flag of a lead frame, with a die attach material. A fillet of the bonding material is formed within the undercut.

Abstract translation: 半导体器件包括具有第一和第二相对面和边缘表面的半导体管芯。 边缘表面在第一面下方具有底切。 半导体管芯的第二面通过管芯附着材料接合到管芯支撑构件的接合表面，例如引线框架的导热标记。 在底切下形成接合材料的圆角。

公开(公告)号：US20120238058A1

公开(公告)日：2012-09-20

申请号：US13398816

申请日：2012-02-16

Applicant: Junhua LUO ,  Zhigang BAI ,  Nan XU ,  Jinzhong YAO

Inventor： Junhua LUO ,  Zhigang BAI ,  Nan XU ,  Jinzhong YAO

IPC: H01L21/50

CPC classification number: H01L21/568 ,  H01L21/561 ,  H01L21/565 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/552 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method of assembling semiconductor devices includes placing an array of semiconductor dies on a die support. A cap array structure is provided that has a corresponding array of caps supported by a cap frame structure. The cap array structure and the array of semiconductor dies on the die support are aligned, with the caps extending over corresponding semiconductor dies, in a mold chase. The array of semiconductor dies and the array of caps are encapsulated with a molding compound in the mold chase. The encapsulated units of the semiconductor dies with the corresponding caps are removed from the mold chase and singulated. Singulating the encapsulated units may include removing the cap frame structure from the encapsulated units.

Abstract translation: 一种组装半导体器件的方法包括将半导体管芯的阵列放置在管芯支撑件上。 提供一种帽阵列结构，其具有由帽框架结构支撑的相应的帽阵列。 在模具追逐中，盖阵列结构和模具支撑件上的半导体管芯阵列与盖延伸在对应的半导体管芯上对齐。 半导体管芯阵列和盖阵列通过模具化合物封装在模具追逐中。 将具有相应盖的半导体管芯的封装单元从模具中取出并分离。 编码封装的单元可以包括从封装单元去除盖框架结构。