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1.发明授权Apparatus and method for M-ary demodulation in a digital communication system 失效一种数字通信系统中M-ary解调的装置和方法公开(公告)号：US06925133B2
公开(公告)日：2005-08-02
申请号：US10038869
申请日：2001-12-31
CPC分类号： H04L1/0059 , H04B1/707 , H04B1/7115 , H04L1/0054 , H04L1/0071 , H04L27/2075
摘要： A demodulator for demodulating a set of S possible orthogonal modulation codes received serially as binary data, wherein each of the orthogonal modulation codes comprises M binary bits representing an N-bit data symbol and wherein M=2N. The demodulator comprises: 1) a Logic 0 input detector for comparing each of the M binary bits of the serially received orthogonal modulation codes to a Logic 0 and outputting a +1 signal if a match occurs and outputting a −1 signal if a match does not occur; 2) a summation circuit comprising S accumulators; 3) a Logic 0 switch array comprising S switches, wherein a Kth one of the S switches in the Logic 0 switch array couples an output of the Logic 0 input detector to a first input of a Kth one of the S accumulators; 4) a storage array for storing the S orthogonal modulation codes; and 5) control circuitry for synchronously applying the M bits in a Kth one of the S orthogonal modulation codes in the storage array as a switch control signal to the Kth switch in the Logic 0 switch array so that each Logic 0 binary data in the Kth orthogonal modulation code closes the Kth switch in the Logic 0 switch array, thereby connecting the output signal of the Logic 0 input detector to the first input of the Kth accumulator.
摘要翻译： 一种用于解调串行接收为二进制数据的一组S个可能正交调制码的解调器，其中每个正交调制码包括表示N位数据符号的M个二进制位，并且其中M = 2 N N。 解调器包括：1）逻辑0输入检测器，用于将串行接收的正交调制码的M个二进制位中的每一个与逻辑0进行比较，并且如果匹配发生则输出+1信号，如果匹配则输出-1信号 不发生; 2）包括S个累加器的求和电路; 3）包括S开关的逻辑0开关阵列，其中逻辑0开关阵列中的第K个开关阵列将逻辑0输入检测器的输出耦合到S个累加器中的第K个的第一输入; 4）用于存储S个正交调制码的存储阵列; 以及5）控制电路，用于将存储阵列中的S个正交调制码的第K个中的M位同步施加为逻辑0开关阵列中的第K个开关的开关控制信号，使得第K个中的每个逻辑0二进制数据 正交调制码关闭逻辑0开关阵列中的第K个开关，从而将逻辑0输入检测器的输出信号连接到第K个累加器的第一个输入。
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2.发明授权Apparatus and method for signal reception in multiple input multiple output (MIMO) communication system 有权多输入多输出（MIMO）通信系统中信号接收的装置和方法公开(公告)号：US07848461B2
公开(公告)日：2010-12-07
申请号：US11705800
申请日：2007-02-13
申请人： Garmanov Alexander Vasil'evich , Joseph Robert Cleveland , Karpinsky Yuri Evgen'evitch , Kravtsova Galina Semenovna
发明人： Garmanov Alexander Vasil'evich , Joseph Robert Cleveland , Karpinsky Yuri Evgen'evitch , Kravtsova Galina Semenovna
IPC分类号： H04L27/06
CPC分类号： H04L1/06 , H04L1/0045
摘要： A method for signal reception in a Multiple-Input-Multiple-Output (MIMO) communication system is provided. The method enhances the efficiency of signal reception in the MIMO system and simplifies the algorithms of signal reception and soft decoding metrics generation. In other words, soft decisions are generated according to correlations between metrics corresponding to least reliable bits based on MMSE linear estimation and noise variance estimation is provided to improve performance when an error is generated in channel matrix H estimation.
摘要翻译： 提供了一种用于多输入多输出（MIMO）通信系统中的信号接收的方法。 该方法提高了MIMO系统中信号接收的效率，简化了信号接收和软解码度量生成算法。 换句话说，根据基于MMSE线性估计的与最不可靠比特对应的度量之间的相关性生成软判决，并且提供噪声方差估计以在信道矩阵H估计中产生错误时提高性能。
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3.发明授权Apparatus and method for detecting pilot channel signals with low signal-to-noise 失效用于检测低信噪比的导频信道信号的装置和方法公开(公告)号：US06917645B2
公开(公告)日：2005-07-12
申请号：US10024092
申请日：2001-12-14
CPC分类号： H04B1/708 , H04B2201/70701
摘要： A CDMA receiver for detecting a pilot channel signal having a known pseudo-random noise (PN) chip sequence, the known PN chip sequence comprising a plurality of known Logic 1 chips and a plurality of known Logic 0 chips. The CDMA receiver comprises: 1) a memory for storing the pilot channel signal as a first original sequence of chip samples; 2) a pseudo-signal generator for re-ordering selected ones of the first original sequence of chip samples to thereby generate a first re-ordered sequence of chip samples, wherein the pseudo-signal generator combines the original sequence of chip samples with the first re-ordered sequence of chip samples to thereby generate a first pseudo-signal sequence of combined chip samples; 3) a first matched filter for computing a first correlation value indicating a relative correlation between the first pseudo-signal sequence of combined chip samples and the known PN chip sequence; and 4) a decision circuit for determining from the first correlation value if the pilot channel signal has been detected.
摘要翻译： 一种用于检测具有已知伪随机噪声（PN）码片序列的导频信道信号的CDMA接收机，已知的PN码片序列包括多个已知的逻辑1码片和多个已知的逻辑0码片。 CDMA接收机包括：1）存储器，用于存储导频信道信号作为芯片样本的第一原始序列; 2）伪信号发生器，用于对芯片样本的第一原始序列中的所选择的重新排序，从而产生芯片样本的第一重排序列，其中伪信号发生器将原始序列的码片样本与第一 重新排序的芯片样本序列，从而产生组合芯片样本的第一伪信号序列; 3）第一匹配滤波器，用于计算指示组合芯片样本的第一伪信号序列与已知PN码片序列之间的相对相关性的第一相关值; 以及4）判定电路，用于根据所述第一相关值确定是否检测到所述导频信道信号。
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公开(公告)号：US07023900B2
公开(公告)日：2006-04-04
申请号：US10022767
申请日：2001-12-14
IPC分类号： H04B1/69
CPC分类号： H04B1/7097 , H04B2201/70706 , H04J13/0048
摘要： A CDMA transmitter that limits the peak-to-average ratio to a selected maximum level. The CDMA transmitter comprises: 1) a first baseband combiner for receiving N baseband chip streams, each of the N baseband chip streams comprising a sequence of chips, each chip having one of a positive amplitude value and a negative amplitude value, wherein the first baseband combiner combines chips from corresponding time slots in each of the N baseband chip streams to thereby generate a first composite baseband chip sequence; 2) a data processor for detecting a first peak amplitude in the first composite baseband chip sequence that exceeds a pre-determined maximum threshold and determining an amplitude and a polarity of a first compensation pulse associated with the first peak amplitude; and 3) a pulse generator for generating the first compensation pulse having the amplitude and the polarity determined by the data processor. The first baseband combiner then combines the first compensation pulse with the first composite baseband chip sequence during a chip time slot corresponding to the first peak amplitude.
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公开(公告)号：US06052068A
公开(公告)日：2000-04-18
申请号：US824242
申请日：1997-03-25
CPC分类号： G07B15/063 , B60R25/00 , G07C5/008 , G08G1/017
摘要： A vehicle identification system for identifying motor vehicles in a group of vehicles at distances in excess of 200 feet is disclosed. The system includes an interrogator for directionally broadcasting an interrogation signal toward a vehicle of interest and a set of vehicle identification tags attached to the vehicles for receiving interrogation signals and sending a response signal to the interrogator. The response signal consists of information from the memory in the vehicle identification tag which allows the interrogator to identify the ownership or registration of the vehicle. Preferably, the tags have at least two memory portions with one portion being more secure than the other. Information useful to law enforcement agencies may be stored in the more secure memory portion and information for public or commercial use, such as parking access codes and toll information may be stored in the less secure memory portion. The system can link to an external database to verify and obtain more information regarding the owner of the vehicle, such as name, address, and record of traffic violations. Each tag on the vehicle also communicates with the other tags in the tag set on a vehicle, and, if the tags within a set are separated beyond a preset distance or otherwise subjected to tampering, the tags will transmit an alarm to any nearby interrogator.
摘要翻译： 公开了用于识别距离超过200英尺的一组车辆中的机动车辆的车辆识别系统。 该系统包括用于向感兴趣的车辆定向地广播询问信号的询问器和附接到车辆的一组车辆识别标签，用于接收询问信号并向询问器发送响应信号。 响应信号由来自车辆识别标签中的存储器的信息组成，其允许询问器识别车辆的所有权或注册。 优选地，标签具有至少两个存储器部分，其中一部分比另一部分更安全。 对执法部门有用的信息可以存储在更安全的存储器部分中，用于公共或商业用途的信息，例如停车访问代码，并且长途信息可以存储在较不安全的存储器部分中。 系统可以链接到外部数据库，以验证和获取有关车辆所有者的更多信息，例如交通违规的名称，地址和记录。 车辆上的每个标签还与设置在车辆上的标签中的其他标签通信，并且如果一组内的标签被分离超过预设距离或以其他方式受到篡改，则标签将向附近的询问器发送报警。
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