公开(公告)号：US20050273635A1

公开(公告)日：2005-12-08

申请号：US10871638

申请日：2004-06-17

Applicant: Jeffrey Wilcox ,  Shivnandan Kaushik ,  Stephen Gunther ,  Devadatta Bodas ,  Siva Ramakrishnan ,  David Poisner ,  Lance Hacking

Inventor： Jeffrey Wilcox ,  Shivnandan Kaushik ,  Stephen Gunther ,  Devadatta Bodas ,  Siva Ramakrishnan ,  David Poisner ,  Lance Hacking

IPC: G06F1/26 ,  G06F1/30 ,  G06F1/32

CPC classification number: G06F1/26 ,  G06F1/3203 ,  G06F1/3246 ,  G06F1/3287 ,  Y02D10/171 ,  Y10T307/438

Abstract: Methods and apparatuses for coordination of power state management in and electronic system.

Abstract translation: 电力系统管理与电力系统协调的方法与装置。

公开(公告)号：US06185634B2

公开(公告)日：2001-02-06

申请号：US08720102

申请日：1996-09-27

Applicant: Jeffrey Wilcox

Inventor： Jeffrey Wilcox

IPC: G06F1328

CPC classification number: G06F13/28

Abstract: An address triggered DMA controller includes a DMA engine for controlling transfer of data between an external device and locations in a memory designated by respective addresses. Such a DMA controller also includes a DMA monitor for monitoring the respective addresses, and if one of the respective addresses matches a predetermined value, generating a signal to indicate a match.

Abstract translation: 地址触发的DMA控制器包括一个DMA引擎，用于控制外部设备之间的数据传输和由各个地址指定的存储器中的位置。 这样的DMA控制器还包括用于监视相应地址的DMA监视器，并且如果各个地址中的一个匹配预定值，则生成指示匹配的信号。

公开(公告)号：US20100330927A1

公开(公告)日：2010-12-30

申请号：US12495706

申请日：2009-06-30

Applicant: Naveen Cherukuri ,  Jeffrey Wilcox ,  Venkatraman Iyer ,  Selim Bilgin ,  David D. Dunning ,  Robin Tim Frodsham ,  Theodore Z. Schoenborn ,  Sanjay Dabral

Inventor： Naveen Cherukuri ,  Jeffrey Wilcox ,  Venkatraman Iyer ,  Selim Bilgin ,  David D. Dunning ,  Robin Tim Frodsham ,  Theodore Z. Schoenborn ,  Sanjay Dabral

IPC: H04B7/00

CPC classification number: G06F1/3287 ,  G06F1/3296 ,  H04W52/0219 ,  H04W52/0229 ,  Y02D70/122

Abstract: Methods and apparatus relating to link power savings with state retention are described. In one embodiment, one or more components of two agents coupled via a serial link are turned off during idle periods while retaining link state in each agent. Other embodiments are also disclosed.

Abstract translation: 描述了与链路功率节省与状态保持有关的方法和设备。 在一个实施例中，通过串行链路耦合的两个代理的一个或多个组件在空闲时段期间被关闭，同时保持每个代理中的链路状态。 还公开了其他实施例。

公开(公告)号：US20080075107A1

公开(公告)日：2008-03-27

申请号：US11950314

申请日：2007-12-04

Applicant: Naveen Cherukuri ,  Jeffrey Wilcox ,  Sanjay Dabral ,  Phanindra Mannava ,  Aaron Spink ,  David Dunning ,  Tim Frodsham ,  Theodore Schoenborn

Inventor： Naveen Cherukuri ,  Jeffrey Wilcox ,  Sanjay Dabral ,  Phanindra Mannava ,  Aaron Spink ,  David Dunning ,  Tim Frodsham ,  Theodore Schoenborn

IPC: H04L12/413

CPC classification number: G06F1/3209 ,  G06F1/3253 ,  H04L12/12 ,  Y02D10/151 ,  Y02D50/20 ,  Y02D50/40

Abstract: Disclosed are embodiments of a method, apparatus and system for a low power state for a point-to-point link. During the low power state, the signal on both conductors of a differential transmit pair are driven to electrical idle. Analog activity detectors are enabled during the low power state and are disabled during normal power state. Exit from the low power state does not require a physical layer re-initialization sequence. Other embodiments are also described and claimed.

公开(公告)号：US20050262365A1

公开(公告)日：2005-11-24

申请号：US10850775

申请日：2004-05-21

Applicant: Bernard Lint ,  Alon Naveh ,  Shivnandan Kaushik ,  Jeffrey Wilcox ,  Lance Hacking ,  Ping Sager ,  Kushagra Vaid ,  Todd Dutton

Inventor： Bernard Lint ,  Alon Naveh ,  Shivnandan Kaushik ,  Jeffrey Wilcox ,  Lance Hacking ,  Ping Sager ,  Kushagra Vaid ,  Todd Dutton

IPC: G06F1/26

CPC classification number: G06F11/3419 ,  G06F11/3452 ,  G06F11/3466 ,  G06F2201/88 ,  Y02D10/34

Abstract: A mechanism for P-state feedback to operating system (OS) with hardware coordination is described herein. In one embodiment, an example of a process includes, but is not limited to, receiving data from a processor representing an average performance over a pervious period of time, and determining a performance state (P-state) for a next period of time based in part on the data representing the average performance over the previous period of time. Other methods and apparatuses are also described.

Abstract translation: 本文描述了具有硬件协调的对操作系统（OS）的P状态反馈的机制。 在一个实施例中，过程的示例包括但不限于从处理器接收表示在一段时间内的平均性能的数据，以及基于下一个时间段确定性能状态（P状态） 部分来自表示前一段时间内的平均表现的数据。 还描述了其它方法和装置。

公开(公告)号：US08831666B2

公开(公告)日：2014-09-09

申请号：US12495706

申请日：2009-06-30

Applicant: Naveen Cherukuri ,  Jeffrey Wilcox ,  Venkatraman Iyer ,  Selim Bilgin ,  David D. Dunning ,  Robin Tim Frodsham ,  Theodore Z. Schoenborn ,  Sanjay Dabral

Inventor： Naveen Cherukuri ,  Jeffrey Wilcox ,  Venkatraman Iyer ,  Selim Bilgin ,  David D. Dunning ,  Robin Tim Frodsham ,  Theodore Z. Schoenborn ,  Sanjay Dabral

IPC: H04B7/00

CPC classification number: G06F1/3287 ,  G06F1/3296 ,  H04W52/0219 ,  H04W52/0229 ,  Y02D70/122

Abstract: Methods and apparatus relating to link power savings with state retention are described. In one embodiment, one or more components of two agents coupled via a serial link are turned off during idle periods while retaining link state in each agent. Other embodiments are also disclosed.

Abstract translation: 描述了与链路功率节省与状态保持有关的方法和设备。 在一个实施例中，通过串行链路耦合的两个代理的一个或多个组件在空闲时段期间被关闭，同时保持每个代理中的链路状态。 还公开了其他实施例。

公开(公告)号：US20070118677A1

公开(公告)日：2007-05-24

申请号：US11129250

申请日：2005-05-13

Applicant: Ron Swartzentruber ,  Jeffrey Wilcox

Inventor： Ron Swartzentruber ,  Jeffrey Wilcox

IPC: G06F13/00

CPC classification number: G06F13/4022 ,  H04L49/101 ,  H04L49/109 ,  H04L49/201

Abstract: An integrated circuit on which are implemented a number of devices that conform to the Rapidio network architecture. Included in the integrated circuit are two addressed RapidIO devices and switching devices which provide 24 switching ports. The devices have a packet receiving side and a packet transmitting side; the packet receiving side of each of the devices is connected by 128-bit wide paths termed poles its own packet transmitting side and each of the other transmitting sides. Features of the integrated circuit include centralized multicasting and configuration control for all of the devices on the integrated circuit, provisions for having more than one address in a RapidIO device, techniques for defining the address space routed by a routing table, techniques for managing congestion, and advanced buffer management techniques.

Abstract translation: 实现了符合Rapidio网络架构的多个设备的集成电路。 集成电路中包含两个提供24个交换端口的RapidIO设备和交换设备。 这些设备具有分组接收侧和分组发送侧; 每个设备的分组接收侧由其自己的分组发送侧和每个其他发送侧的被称为极点的128位宽路径连接。 集成电路的特征包括集成电路上的所有设备的集中组播和配置控制，在RapidIO设备中具有多于一个地址的规定，用于定义由路由表路由的地址空间的技术，用于管理拥塞的技术， 和先进的缓冲管理技术。

公开(公告)号：US20060256793A1

公开(公告)日：2006-11-16

申请号：US11129247

申请日：2005-05-13

Applicant: Ron Swartzentruber ,  Jeffrey Wilcox

Inventor： Ron Swartzentruber ,  Jeffrey Wilcox

IPC: H04L12/56

CPC classification number: H04L49/9047 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9021

Abstract: An integrated circuit on which are implemented a number of devices that conform to the Rapidio network architecture. Included in the integrated circuit are two addressed RapidIO devices and switching devices which provide 24 switching ports. The devices have a packet receiving side and a packet transmitting side; the packet receiving side of each of the devices is connected by 128-bit wide paths termed poles its own packet transmitting side and each of the other transmitting sides. Features of the integrated circuit include centralized multicasting and configuration control for all of the devices on the integrated circuit, provisions for having more than one address in a RapidIO device, techniques for defining the address space routed by a routing table, techniques for managing congestion, and advanced buffer management techniques.

Abstract translation: 实现了符合Rapidio网络架构的多个设备的集成电路。 集成电路中包含两个提供24个交换端口的RapidIO设备和交换设备。 这些设备具有分组接收侧和分组发送侧; 每个设备的分组接收侧由其自己的分组发送侧和每个其他发送侧的被称为极点的128位宽路径连接。 集成电路的特征包括集成电路上的所有设备的集中多播和配置控制，在RapidIO设备中具有多于一个地址的规定，用于定义由路由表路由的地址空间的技术，用于管理拥塞的技术， 和先进的缓冲管理技术。

公开(公告)号：US20060034295A1

公开(公告)日：2006-02-16

申请号：US10850851

申请日：2004-05-21

Applicant: Naveen Cherukuri ,  Aaron Spink ,  Phanindra Mannava ,  Tim Frodsham ,  Jeffrey Wilcox ,  Sanjay Dabral ,  David Dunning ,  Theodore Schoenborn

Inventor： Naveen Cherukuri ,  Aaron Spink ,  Phanindra Mannava ,  Tim Frodsham ,  Jeffrey Wilcox ,  Sanjay Dabral ,  David Dunning ,  Theodore Schoenborn

IPC: H04L12/56 ,  H04L12/28

CPC classification number: H04L67/141 ,  G06F13/4265 ,  H04L65/60 ,  Y02D10/14 ,  Y02D10/151

Abstract: Systems and methods of managing a link provide for receiving a remote width capability during a link initialization, the remote width capability corresponding to a remote port. A link between a local port and the remote port is operated at a plurality of link widths in accordance with the remote width capability.

Abstract translation: 管理链路的系统和方法提供了在链路初始化期间接收远程宽度能力，即对应于远程端口的远程宽度能力。 根据远程宽度能力，本地端口和远程端口之间的链路以多个链路宽度进行操作。

公开(公告)号：US20050179293A1

公开(公告)日：2005-08-18

申请号：US10908167

申请日：2005-04-29

Applicant: Jeffrey Wilcox

Inventor： Jeffrey Wilcox

IPC: A47C1/02 ,  A47C7/14 ,  B60N2/54

CPC classification number: B60N2/502 ,  A47C7/024 ,  A47C7/14 ,  B60N2/544 ,  B60N2/546

Abstract: A seat suspension has a base and a seat support. A foundation extends upwardly at a forward portion of the base. A pair of panels hingedly extends from the foundation, with a spring between each panel and the base. In one embodiment, the panels are hinged to the foundation by a living hinge. In another embodiment, the panels are formed of glass springs, wherein each panel comprises one arm of the spring. In another embodiment, the seat suspension is adjustable.

Abstract translation: 座椅悬挂件具有基座和座椅支撑件。 基座在基部的前部向上延伸。 一对面板从基座铰接地延伸，弹簧在每个面板和基座之间。 在一个实施例中，面板通过活动铰链铰接到基座。 在另一个实施例中，面板由玻璃弹簧形成，其中每个面板包括弹簧的一个臂。 在另一个实施例中，座椅悬挂是可调节的。